Basically, when we switch from WSDISPLAYIO_MODE_EMUL to anything else, we
release any bus_space resources. When we return to WSDISPLAYIO_MODE_EMUL,
reclaim these resources and reinitialize the display.
Idea from macallan@
This should allow radeonfb to do The Right Thing on Macs that use non-
standard video timings and have built-in monitors that don't provide data
via DDC since those usually have an EDID block in the OF tree.
- replace rtk_type member in rtk_softc which has chip types
with new rtk_quirk that represents quirks on each chip:
- RTKQ_8129 doesn't have internal MII (used in rtk(4))
- RTKQ_8139CPLUS has different register layout (for re(4))
- RTKQ_8169NONS (original 8169) requires some settings on init
- RTKQ_PCIE requires different settings in setmulti
so that we don't have to check each hwrev values or types everywhere
and newer variants will also work without changes if they don't
have other quirks
(sc_rev is unchenged for now for reference to the Realtek's driver)
- don't check hwrev register in re_pci_match() but check
only PCI_VENDER(), PCI_PRODUCT() and PCI_REVISION()
so that we no longer have to map pci space there
- add a new HWREV value for another 8168 variant
- try to map PCI mem space more properly
- remove (probably unneeded) ifp->if_baudrate initialization
Tested on a newer 8168 variant by Dennis den Brok on tech-kern,
and also tested on 8139 and 8169C on macppc, and 8139C+ on landisk
by me.
Minor modifications by me:
-use an mi device major number
-(coarsly) divided into pci card specific and less specific parts, moved
the latter to dev/drm
-renamed autoconf attributes to reflect this
Todo:
-adapt all card frontends but i915 to drm include file location
-review the mtrr change
-make the change to agp_i810.c coexist with the fix for buggy VESA
BIOSes which is commented out temporarily
-RCS IDs etc style stuff
-LKM support (rescan support for vga)
-test
sets IDE_IRQA in the IDE Control/Status Register. This is needed on prep
machines with Motorola RAVEN host bridges, as they wire up the ide device
oddly.
> Apply OpenBSD's rev. 1.33 to shut up "msk0: phy write timed out"
>
> Original commit message:
> > In msk_marv_miibus_writereg, wait for busy flag to clear instead of
> > continuing when busy flag set.
- make DMA descriptors volatile to avoid possible unintended reordering
which might cause some race conditions
- process interrupts until all NFE_IRQ_WANTED bits are handled
and also put misc fixes:
- return 1 and call nfe_start() in nfe_intr() only if any own interrupts
are actually handled
- use bus_dmamap_load_mbuf(9) for RX mbufs rather than bus_dmamap_load(9)
with mtod(9) and MCLBYTES
- check sc->txq.queued to see if TX descriptors are queued or handled
in nfe_start() and nfe_txeof()
- use proper BUS_DMASYNC_{PRE,POST} ops
- prepare and use NFE_[RT]X_NEXTDESC() macro
- rename NFE_TX_TCP_CSUM to NFE_TX_TCP_UDP_CSUM since it also enables
hardware udp4csum-tx for UDP4 packets
- some minor optimization
- misc KNF
Tested and confirmed by matthew green by
"to send >25MB/sec to nfe0 for over one hour,"
and also tested by me (with light TRX load on 100baseTX though)
for a month.
with newlock2 merge:
Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
int _bus_dmatag_subregion(bus_dma_tag_t tag,
bus_addr_t min_addr,
bus_addr_t max_addr,
bus_dma_tag_t *newtag,
int flags)
void _bus_dmatag_destroy(bus_dma_tag_t tag)
that allow a (normally broken/limited) device to restrict the bus address
range it can talk to. this is used by bce(4) to limit DMA addresses to
1GB range, the maximum the chip can address.
all this is from Yorick Hardy <yhardy@uj.ac.za> with input from several
people on tech-kern.
XXX: bus_dma(9) needs an update still.
the wrong place in the buffer. Fix an issue in the !sc->bge_rx_alignment_bug
case reported by Nicolas Joly.
While there remove a duplicate m_adj(), and add a missing bus_dmamap_unload().
parentheses in return statements.
Cosmetic: don't open-code TAILQ_FOREACH().
Cosmetic: change types of variables to avoid oodles of casts: in
in6_src.c, avoid casts by changing several route_in6 pointers
to struct route pointers. Remove unnecessary casts to caddr_t
elsewhere.
Pave the way for eliminating address family-specific route caches:
soon, struct route will not embed a sockaddr, but it will hold
a reference to an external sockaddr, instead. We will set the
destination sockaddr using rtcache_setdst(). (I created a stub
for it, but it isn't used anywhere, yet.) rtcache_free() will
free the sockaddr. I have extracted from rtcache_free() a helper
subroutine, rtcache_clear(). rtcache_clear() will "forget" a
cached route, but it will not forget the destination by releasing
the sockaddr. I use rtcache_clear() instead of rtcache_free()
in rtcache_update(), because rtcache_update() is not supposed
to forget the destination.
Constify:
1 Introduce const accessor for route->ro_dst, rtcache_getdst().
2 Constify the 'dst' argument to ifnet->if_output(). This
led me to constify a lot of code called by output routines.
3 Constify the sockaddr argument to protosw->pr_ctlinput. This
led me to constify a lot of code called by ctlinput routines.
4 Introduce const macros for converting from a generic sockaddr
to family-specific sockaddrs, e.g., sockaddr_in: satocsin6,
satocsin, et cetera.
- remove the code to bring down the PHY in bnx_stop(), it's wrong
(ifm_data isn't updated) and lead to a panic in mii_phy_setmedia(),
or reading past the end mii_media_table[].
- make sure the dma_map matches the mbuf in the rx structures. We would
sync/unload the wrong map, leading to a DIAGNOSTIC panic, or eventually
leaking memory when bounce buffers are needed.
needs to be rewritten to use the scsipi layer. Additionally:
- Missing copyright years: 2000, 2001, 2002, 2003
- Missing attribution: Andrew Doran and Jason R. Thorpe
If we're handling system management interrupts ourselves, the system locks
solid when the ACPI timer SCI fires. Disable this interrupt so we can have
an uptime of more than ~10 minutes.
The "pci0 dev 1 function 2" aka "System Management" on the nForce chipset
isn't detected on the Xbox. If XBOX is defined and arch_i386_is_xbox is
true, force intrline to 12 and map the system management IO space at
0x8000. We can now call iic_smbus_intr when a system management interrupt
takes place.
While we're here, make amdpm_smbus honour the I2C_F_POLL flag.
The Xbox no longer resets when you press the eject button.
Most Cardbus bridges supported by pccbb(4) fire a power-cycle
interrupt when the power state of a cardslot changes from 'off' to
'on'. TI bridges fire a power-cycle interrupt on both on->off and
off->on changes.
When pccbb_power() powered-down a cardslot, it did not wait around
for the power-cycle interrupt. When pccbb_power() powered-up a
cardslot, it did wait for the interrupt. If a pccbb_power(UP)
followed a pccbb_power(DOWN) very closely, pccbb_power() used to
interpret the power-cycle interrupt for the up->down transition as
"power-up complete," read the power-state bit and, finding that
power had NOT been activated, complain, "cbb0: power on failed?"
Then pccbb_power() exited before power-activation was complete,
falsely indicating that the power-activation *was* complete. After
that, a driver attach/enable routine would blithely configure a
card that was not fully powered-up. An operator who ran a command
such as 'ifconfig rtw0 down up' or 'ifconfig ath0 down up' would
read 'cbb0: power on failed?' in the system log, and their NIC
would misbehave.
This excerpt from a comment in the source should suffice to explain
how I fixed the bug,
/*
* Wait as long as 200ms for a power-cycle interrupt. If
* interrupts are enabled, but the socket has already
* changed to the desired status, keep waiting for the
* interrupt. "Consuming" the interrupt in this way keeps
* the interrupt from prematurely waking some subsequent
* pccbb_power call.
And this explains why this patch will work for Ricoh bridges that
do not fire an interrupt on the on->off transition:
* XXX Not every bridge interrupts on the ->OFF transition.
* XXX That's ok, we will time-out after 200ms.
*
* XXX The power cycle event will never happen when attaching
* XXX a 16-bit card. That's ok, we will time-out after
* XXX 200ms.
*/
M. Warner Losh and Charles M. Hannum provided valuable input on
this patch.
by adding the "nargs" argument to the macppc version, and fix the macppc
ports uses of OF_interpret() accordingly.
Also move the declaration of OF_interpt() from macppc's autoconf.h to
ofw/openfirm.h. This fixes the build of the macppc port.
Approved by macallan@.
* Support for the VIA VT8231 Hardware monitor.
* Power Management Timer available for timecounters in both
VT86C686A and VT8231 (code simplified thanks to dev/ic/acpipmtimer).
* Remove viapm(4) code and manpage (which was a link to viaenv.4 anyway).
From OpenBSD, tested by some users.
make the default values of bidirectional pins `output' because
they were often the main reason of no sound problems.
* add stac9221_mixer_init()
It has a code for Intel Mac but it is disabled for now.
values from the smbus before. amdpm_smbus_exec was using the values read
from the registers and using them as return values instead of filling in
the caller's buffer.
with other users who have been experiencing watchdog timeouts:
* Mask all interrupts while servicing a tx or rx interrupt.
* On init, clear IRQ status registers (workaround for buggy netbooters).
> Defer setting of the valid bit in the first TX descriptor after
> all descriptors have been setup. Otherwise, hardware may start
> processing descriptors faster than us and crap out.
> Fixes "watchdog timeout" errors.
>
> Original idea from Matthew Dillon @DragonFly.
- print PCI device name and revision
- print interrupt and Ethernet address like other devices
Before:
---
nfe0 at pci0 dev 5 function 0LKLN: Picked IRQ 20 with weight 1
: ioapic0 pin 20 (irq 9), address xx:xx:xx:xx:xx:xx
After:
---
nfe0 at pci0 dev 5 function 0: NVIDIA nForce3 ethernet #4 (rev. 0xa2)
LKLN: Picked IRQ 20 with weight 1
nfe0: interrupting at ioapic0 pin 20 (irq 9)
nfe0: Ethernet address xx:xx:xx:xx:xx:xx
(note "Picked IRQ" message is logged by aprint_verbose(9) in acpi(4))
bridge that precludes the ThunderLAN's DMA engine from performing segment
transfers across page boundaries. Add logic under #ifdef TL_SETENG_GFE to
split up these segment transfers appropriately.
It's unknown whether this issue could also affect the RX path, though no
problems have been observed yet.
- finish implementing splraiseipl (and makeiplcookie).
http://mail-index.NetBSD.org/tech-kern/2006/07/01/0000.html
- complete workqueue(9) and fix its ipl problem, which is reported
to cause audio skipping.
- fix netbt (at least compilation problems) for some ports.
- fix PR/33218.
- Mostly sync with OpenBSD
- Serialise sending commands to the firmware
- Remove redundant calls to bpfdetach.
- use bus_size_t where appropriate and not fetch iobase as it's not
used.
- improve 802.11 radiotap support (correct rx rate)
- add short preamble flag
- add short slot time support
- ignore parity errors (as per the Linux driver)
- Set Tx power for all channels.
- disable bluetooth co-existance
- Check that ni->ni_rates.rs_nrates is not greater than the maximum
handled by the firmware.
- Begin syncing with the FreeBSD driver by renaming a few things.
nonsense quirk that switched operating mode on ICH7 and ICH8.
I removed the obvious candidates for ahcisata(4), and I'll have a closer
look later if there are others to be removed; ahcisata(4) will take over
handling the device anyway, but there is no reason to keep AHCI devices in
that list.
Along the way, remove the code that tries to put the chip in Enhanced mode,
it makes absolutely no sense to do that, and some BIOSes might not have
prepared the BARs for that, as proven by PR#34885. If people want to use
all IDE and SATA channels, they have to tell the BIOS.
- checking if dmamap != NULL is not valid because dmamap is not cleared
in bus_dmamap_unload(9)
- no need check RX mbufs and call m_freem() and bus_dmamap_unload()
in vge_init() since it's done in prior vge_stop()
Now vge(4) works fine on Ultra5.
arithmetic on ILP32 (sizeof(bus_addr_t) == 4, exactly) hosts
- prepare and use VGE_PREV_TXDESC() macro
- use VGE_[TR]XDESCSYNC() calls more efficiently
- wrap a sanity check against VGE_RDSTS_OWN in vge_newbuf()
with #ifdef DIAGNOSTIC since it should not happen
- use sc->sc_tx_free (number of free TX descs) to check if TX packets are
queued or sent
- call vge_start() only if the interupt is actually handled by this driver
- some misc cosmetics
length and define VGE_RX_PAD (which is 4 bytes) for ETHER_ALIGN (2 bytes)
padding only in !__NO_STRICT_ALIGNMENT case to avoid confusion.
As per comments from Murata Shuuichirou in PR kern/31323.
Tested on i386 and macppc.
In OpenBSD's if_bgereg.h, CHIPID 0x4101000 is defined as BCM5750_B1
but our PR kern/31028 says it's BCM5751_A1 on BCM5751M on IBM T43p,
and the value seems reasonable.
> - Move TX ring full sanity check further up and check the number of DMA
> segments from the DMA map, instead of counting the DMA segments in the
> for loop and breaking out later.
> - Unload the DMA map if encountering an error condition.
committed in rev 1.22), save it before calling m_defrag().
I haven't confirmed whether the m_pkthdr.csum_flags is preserved during
m_defrag(), but the previous way sometimes makes vge(4) chip mad...
Perform hardware diagnostic only on the original RTL8169,
which was the only device that really needed it.
(i.e. a possible hardware bug when the NIC was put on a 64bit PCI slot)
Tested with on-board 8139C+ by Brian A. Seklecki.
Note this change might also fix PR kern/34952
(because re_diag() is no longer called on 8169S/8110S),
but I'm not sure if the re(4) chip was properly initialized in such case.
from FreeBSD's if_vr.c rev 1.52:
- check more error status in TX descriptor and restart TX module
appropriately in vr_txeof()
- check more error interrupt status in vr_intr()
I can't confirm whether these changes actually fix TX stalls because
I can't reproduce the problem I had about seven years ago (I guess
it might be caused by excessive collisions on a dumb hub), but at least
they don't seem to have bad side effects on normal operations on my macppc.
The commit log in FreeBSD's if_vr.c rev 1.43 says
"This is really only for the VT6102, but it doesn't hurt the older chips,"
but at least it hurts my VT86C100A (which returns a product ID of VT3043)
on macppc and causes kernel MCHK trap while the same board on i386
and VT6102 on macppc have no problem with it.
- in vr_rxeoc() (i.e. on RX error interrupts), disable RX before
calling vr_rxeof() and check it actually stopped
- no recovery is needed for VR_ISR_DROPPED, so just account ierrors
- also account ierrors in vr_rxeoc()
vge_encap() should bail out if there is not enough free
TX descriptor _OR_ TX descriptor is still owned by the chip.
Anyway, we already check if the TX descriptor already has an mbuf
to be sent in vge_start() so no need to bother to check sc_tx_free
and VGE_TDSTS_OWN in the descriptor in normal case, then make it use
KASSERT(9) or wrap with #ifdef DIAGNOSTIC.
XXX1: I don't know why original FreeBSD driver checks
if a number of free TX descriptors is more than two, not zero.
XXX2: Is it better to check a number of free descriptors in vge_start()
like other our drivers rather than mbuf chain for each descriptor?
Fix checksum error problem on sending fragmented large packets,
which was introduced in rev 1.14.
BTW, should we have m_defrag() in MI for other drivers?
- merge if_vgevar.h into if_vge.c since no other file refers it
- rename some macro (VGE_TX_DESC_CNT -> VGE_NTXDESC etc.) and structs
- change prefixes of structure members to represent parents
- put TX and RX descriptors into single struct vge_control_data and
allocate DMA memory at once
- no need to specify BUS_DMA_ALLOCNOW
- define appropriate macro for offsets and addresses of DMA descriptors
- define struct vge_txsoft and vge_rxsoft, and put common data for
each descriptor into them
- remove struct vge_list_data and move its members into struct vge_softc
- remove #ifdef DEVICE_POLLING code we don't support
- merge vge_[tr]x_list_init() functions into vge_init()
- use aprint_error() to print errors
- put splnet(9) where appropriate and remove unused VGE_{LOCK,UNLOCK}() macro
- clear TX timeout only if there is no pending descriptor
- check dm_nsegs properly otherwise padding short packets could fail
- prepare zero'ed DMA memory to pad short packets rather than putting
random data
- fix a wrong VGE_TXDESCSYNC() usage which should be VGE_TXFRAGSYNC()
Tested on my i386 which is my development machine.
(more bus_dmamap_sync(9) cleanup will be done later)
- Remove the PCN_NO_PROM option. Instead, query the am79c970-no-eeprom
property, and read the MAC address from the CSRs if that property is TRUE.
In the ibmnws port:
- Implement device_register().
- In device_register(), set the am79c970-no-eeprom property for the
built-in Ethernet.
jmcneill