- alpha_rpcc(), alpha_mb(), alpha_wmb() -- these are instructions, and
we win by inlining them: rpcc is generally used for profiling, and
the memory barriers really should execute as quickly as possible with
minimal side-effects (like additional loads/stores required to call the
functions!)
- alpha_pal_imb(), alpha_pal_rdps(), alpha_pal_swpipl(), alpha_pal_tbi(),
alpha_pal_whami() -- these are PALcode ops. We must specify some register
clobbers for these.
We have a very decent size savings as a result. My test system:
text data bss dec hex filename
2671724 235848 377016 3284588 321e6c /netbsd.bak
2617708 235736 377016 3230460 314afc /netbsd
Most of this comes from fewer register saves/restores around spl*() calls
(now that alpha_pal_rdps() and alpha_pal_swpipl() are inlined).
Note that alpha_pal_rdps() and alpha_pal_swpipl() remain in pal.s to
maintain binary compatibility with LKMs that may use spl*() functions.
- Attempt to find the model string in the HWRPB's DSR area. Failing that
(if the HWRPB version is too old)...
- Look up the system variation in a variation/string table. Failing that
(unknown variation)...
- Create a default model string using the variation number.
Also, factor out a bunch of common code.
on EV56 and later processors that have the "amask BWX" bit clear. These
instructions will be used to implement non-swizzle bus access functions
on newer systems, such as the new AlphaStation 500s with EV56 and 21172
PCI chipsets.
See "Alpha Architecture Handbook, Version 3", DEC order number EC-QD2KB-TE.
(II-B) 2-33 of the Alpha AXP Architecture Reference Manual, Second Edition:
* rdps - Read Processor Status, needed by spl* functions.
* cflush - Cache Flush
* rdval - Read System Value
* wripir - Write Interprocessor Interrupt Request
* wrval - Write System Value
cflush, rdval, wripir, and wrval are used in multi-processor environments.
rather than and-ing 16G-1. That just strips the k0seg bits, rather
than making the false assumption that the physical address is going
to be in the lower 16G. That doesn't apply for CIA device-space
addresses, for instance.
more naturally in terms of way the OSF/1 PALcode delivers traps and
interrupts. Clean up fault/exception handling code and system entry
points. Seperate ASTs into a seperate C function.
(2) Restructure and improve machine check and correctable error
handling based on information in the 2nd Ed. of the Alpha Architecture
Reference Manual.
(3) Removed unused (and not likely useful) PALcode assembly stubs.
containing a substruct (the hardware frame) and an array of registers,
treat it like one big array of registers, for easier and prettier
access. Update everything to deal with that.
Process Control Block
Interrupt/Exception/Syscall Stack Frame
Machine Check Error Summary Register
Machine Check Logout Area
clean up some, and add prototypes for all of the CPU instruction and
PALcode function stubs.
