There are still about 1600 left, but they have ',' or /* ... */
in the actual variable definitions - which my awk script doesn't handle.
There are also many that need () -> (void).
(The script does handle misordered arguments.)
is called from pciide_attach() and at this point we don't know which drives
are here. Just assume all drives are there and allocate DMA ressources for
all of them.
its only user in pciide_common.c. Also redefine NIDEDMA_TABLES to match
the max DMA transfer size specified in the call to bus_dmamap_create()
(IDEDMA_BYTE_COUNT_MAX instead of MAXPHYS).
The macro is also redefined to handle devices that have a PAGE_SIZE greater
than sc_dma_maxsegsz (buggy revision of satalink 3112 on ibm4xx).
ata_channel.
- Add and use a CHAN_TO_WDC_REGS() macro to get the wdc_regs from an
ata_channel.
- Add and use a CHAN_TO_PCIIDE() macro to get the pciide_softc from an
ata_channel.
- Add and use a CHAN_TO_PCHAN() macro to get the pciide_channel from an
ata_channel. (This one just hides a cast, and is really just for
consistency with the others.)
wdc_regs structure, and array of which (indexed per channel) is pointed
to by struct wdc_softc.
- Move the resulting wdc_channel structure to atavar.h and rename it to
ata_channel. Rename the corresponding flags.
- Add a "ch_ndrive" member to struct ata_channel, which indicates the
maximum number of drives that can be present on the channel. For now,
this is always 2. Add an ATA_MAXDRIVES constant that places an upper
limit on this value, also currently 2.
In default_chip_map() we'll do further checks to see if the channel should
really be enabled, and in case it's not we would keep the interrupt mapped.
Fix kern/26502 from Christian Biere.
registers are registers that overlap with others on many controllers, but
which may actually be distinct on some controllers. Right now, the two
shadows are:
- wd_status (usually overlaps wd_command)
- wd_features (usually overlaps wd_error)
Add a new helper function, wdc_init_shadow_regs(), used to initialize
the shadow register handles on controllers where they do actually overlap.
Partially from Jordan Rhody @ Wasabi Systems, Inc.
- wdc_xfer to ata_xfer
- channel_queue to ata_queue
and move them to <dev/ata/atavar.h> so they can be used by non-wdc ATA
controllers. Clean up the member names of these structures while at it.
register for proper operation. Add a prototype field in the pciide_channel
for this register and use it as necessary when writing the IDEDMA_CMD
register.
in a different fashion. Individually, they have the same functionality,
but their layout is different. An example of such a chipset is
the Promise 203xx.
To be able to deal with this, transform the cmd and dma bus_space handles
into an array of handles, each seperately created with bus_space_subregion.
The code generated by using the extra indirection shouldn't change much,
since the extra indirection is negated by having the offset calculation
already done in bus_space_subregion. E.g.
bus_space_write_4(tag, handle, offset, value)
becomes
bus_space_write_4(tag, handles[offset], 0, value)
Reviewed by Manuel Bouyer. Tested on wdc_isa, wdc_pcmcia, viaide, piixide (i386)
and on cmdide (sparc64).
http://mail-index.netbsd.org/tech-kern/2003/09/25/0007.html
We now have:
acardide* at pci? dev ? function ? # Acard IDE controllers
aceride* at pci? dev ? function ? # Acer Lab IDE controllers
cmdide* at pci? dev ? function ? # CMD tech IDE controllers
cypide* at pci? dev ? function ? # Cypress IDE controllers
hptide* at pci? dev ? function ? # Triones/HighPoint IDE controllers
optiide* at pci? dev ? function ? # Opti IDE controllers
piixide* at pci? dev ? function ? # Intel IDE controllers
pdcide* at pci? dev ? function ? # Promise IDE controllers
siside* at pci? dev ? function ? # SiS IDE controllers
slide* at pci? dev ? function ? # Symphony Labs IDE controllers
viaide* at pci? dev ? function ? # VIA/AMD/Nvidia IDE controllers
pciide* at pci? dev ? function ? flags 0x0000 # GENERIC pciide driver
serverworks driver not commited yet; there are still copyright issues about
it.
