counters. These counters do not exist on all CPUs, but where they
do exist, can be used for counting events such as dcache misses that
would otherwise be difficult or impossible to instrument by code
inspection or hardware simulation.
pmc(9) is meant to be a general interface. Initially, the Intel XScale
counters are the only ones supported.
Be consistant in the way that MSIZE, MCLSHIFT, MCLBYTES and NMBCLUSTERS
are defined.
Remove old VM constants from cesfic port.
Bump MSIZE to 256 on mipsco (the only one that wasn't already 256).
goal here is to get the P-5064 PCMCIA slots working, and serve as
the basis for P-6032 interrupt support.
PCMCIA interrupt auto-detection not working -- more work to be
done here.
- Compute the number of CPU pipeline cycles per second using the
mc146818.
- Use the COMPARE interrupt for the hardclock interrupt.
- Collapse all interrupt priorities into a single priority, and use
the CPU interrupt inputs to determine the interrupt source (local
device, PCI device, ISA device, etc.)
This allows us to have interrupt sharing.
them define __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH
in pci_machdep.h and pciide_map_compat_intr() only calls
pciide_machdep_compat_intr_establish() if that preprocessor
define exists.
Ports that don't need to do this no longer need to supply a
dummy function.
untested, since I have no P-4032 board, but it's no worse than
the current situation, which is "totally non-working P-4032
support in the ARC port, of all places".
support the P-5064, which has a QED RM5xxx CPU soldered on.
There is some skeletal support for the P-4032 (an older board, which
had an R4xxx CPU). There are some placeholders for the P-6032, which
is their newest board, but no real code yet (the P-6032 has a different
PCI controller, the Algorithmics BONITO).
There are still some (apprently softintr-related) problems with the
algor kernel, but it works well-enough to self-host.
Kudos to Allegro Networks for loaning me a P-5064 board on which to do
the port.
