that is priority is rasied. Add a new spllowersoftclock() to provide the
atomic drop-to-softclock semantics that the old splsoftclock() provided,
and update calls accordingly.
This fixes a problem with using the "rnd" pseudo-device from within
interrupt context to extract random data (e.g. from within the softnet
interrupt) where doing so would incorrectly unblock interrupts (causing
all sorts of lossage).
XXX 4 platforms do not have priority-raising capability: newsmips, sparc,
XXX sparc64, and VAX. This platforms still have this bug until their
XXX spl*() functions are fixed.
the hp300 port.
- Interrupts 3-6 use this immediately. Interrupt 7 is a special case,
and the VIA interrupts (1 and 2) will be addressed when that code is
rototilled.
- Modify the zs front end to register with the appropriate interrupt
controller: through the PSC on the AV Quadras, and direct to
interrupt 4 on the rest. Arrange to have the appropriate zsc_softc
supplied to us at interrupt time.
- Modify the direct ADB driver (and its PowerManager cousin) to call
intr_dispatch(), rather than zshard(). XXX This is a kludge, but at
least limits the brokenness to the ADB drivers, now.
As a side effect, this should fix PR 5590. Thanks to Bill Studenmund for
correctly determining the cause of the problem reported there.
internal ethernet on the Quadra/Centris 660av/840av.
Add initial support for the PSC (DMA controller) to support the above
(DMA SCSI remains unsupported). This involved also changing the way
that several interrupts are handled.
Above from David Huang <khym@bga.com>
Since the interrupts changed somewhat, we must also make the ipls
dynamic, defaulting to their prior levels and adjusted for the AVs.
I modelled this on the hp300.
by implementing entirely in assembly. This saves some 6 bytes on all MPUs,
and about 8 cycles on the 030.
Now that it's optimized, define spltty() in terms of _splraise() so that
we don't inadvertantly lower the SPL.
