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113 Commits

Author SHA1 Message Date
msaitoh
29c28998b8 Model 0x5e is also 6th gen Core or Xeon E3-1500 v5 like model 0x4e. 2015-12-04 05:34:59 +00:00
mrg
d94f57291f allow most commands to specify more than one cpu. now you can online or 
offline (or identify, or intr/nointr) a list of cpus all together.
 2015-11-16 03:34:50 +00:00
mrg
f94c9137cf convert getcpuid() to take char* not char** 2015-11-16 02:04:32 +00:00
mrg
0e5e5d5b01 use stdbool.h 2015-11-16 02:02:41 +00:00
msaitoh
df71a53179 Add 6th gen Core, Xeon E3-1500 v5 and Xeon D-1500 from the latest Intel SDM. 2015-10-19 02:47:05 +00:00
msaitoh
a62e5a29f2 Add Xeon E5-4600 v3, Xeon E3-1200 v4 etc. from the latest Intel SDM. 2015-07-01 15:46:26 +00:00
msaitoh
04cf945ec6 Update some Intel CPU models (Sky Lake, Broadwell and Atom X[357]). 2015-05-08 07:29:08 +00:00
msaitoh
c034104b35 Update from Intel SDM: 
- Add Atom Z8000, Future gen Xeon (Broadwell), Next gen Xeon Phi and so on.
- Add comments.
 2015-03-27 05:31:34 +00:00
tnn
d3bf9a40c8 xgetbv expects XCR0 to be speficied in %ecx, don't leave %ecx undefined 2015-03-01 18:02:42 +00:00
msaitoh
d23838029a Fix a bug that an unknown command is printed as "(null)". 
Reported by Fredrik Pettai.
 2014-12-16 04:07:40 +00:00
msaitoh
cbb847784d Don't print the microcode version if the ioctl failed to not to 
print garbage.
 2014-12-11 12:21:44 +00:00
msaitoh
5723de76d5 Add newline if ci_tsc_freq is 0 to not to break the output. 2014-12-11 10:07:45 +00:00
wiz
4cb289deb0 Bump date. Quote minus with a backslash, for PostScript/PDF output. 2014-11-20 13:16:05 +00:00
msaitoh
ce7f2410b4 Fix manual and usage bug. The ucode command can take [cpuno] argument. 2014-11-20 12:49:13 +00:00
msaitoh
1ce97493fe Move some printf()s from cpu_probe_base_features() to identifycpu(). 
Those printf()s are used for "identify" command but cpu_probe_base_features()
is shared by ucodeupdate_check(), too. This change fixes a problem that
the "ucode" command print extra output.
 2014-11-20 10:31:10 +00:00
skrll
519271bdcb kern/49379: Hypervisor's name typo 2014-11-11 08:23:17 +00:00
msaitoh
9a87c4ed9d Add code to detect hypervisor. The code was based from FreeBSD and ported 
by Kengo Nakahara.
 2014-11-07 05:37:05 +00:00
msaitoh
abce3ee962 Update CPUID signature values from the latest Intel SDM. 
- Core M-5xxx
- Core i7 extreme
- Future Core (0x4e)
- Future Xeon (0x56)
 2014-09-09 15:14:39 +00:00
msaitoh
128822ca6e More update: 
- Future Atom E3000, Z3000 (0x4a, 0x5a, 0x5d)
- Atom C2000 (0x4d)
 2014-07-25 14:18:49 +00:00
msaitoh
3d4f4e180c Update table for processor families and processor number series from the 
latest Intel SDM.
- Atom Z3000 (0x37)
- Core M based on Broadwell (0x3d)
- Next gen Xeon based on Haswell (0x3f)
 2014-07-25 13:52:26 +00:00
msaitoh
74aebcc5ae Exclude descriptor 0xff of CPUID leaf 2. 0xff means the cacheinfo is in leaf 4. 2014-07-03 04:11:37 +00:00
msaitoh
cb672750d7 If -v is set and unknown cacheinfo desc is found, print it. 2014-05-27 04:18:00 +00:00
szptvlfn
4893e5b805 Update URL 2014-02-19 09:13:21 +00:00
msaitoh
e84a097d09 - Rename x86_print_cacheinfo() to x86_print_cache_and_tlb_info() because 
this function prints TLB info, too.
- Remove an extra printf when verbose flag is set.
- Print the highest extended info level as the basic info level.
- Sort function.
 2014-01-04 18:13:48 +00:00
wiz
3acb5aa34e Use more common phrasing. 2013-12-23 12:39:55 +00:00
msaitoh
e05de3375f Add verbose flag. 
On x86 cpu, cpuctl -v identify dumps the return values of the cpuid
functions. The max levels are taken from CPUID 0 and CPUID 8000_0000.
It's useful for the future CPU.
 2013-12-23 12:35:33 +00:00
msaitoh
2620370891 CPUID leaf 2 and 4 are only for Intel processors. 2013-12-23 11:17:20 +00:00
msaitoh
1c10986642 Add comments. Remove comments. No functional change. 2013-12-23 10:13:59 +00:00
msaitoh
b1a32cacda Modify some macros and add some new macros for CPU family and model 
to reduce code duplication and to avoid bug.

CPUID_TO_STEPPING(cpuid)	(not changed)

CPUID_TO_FAMILY(cpuid)		(new)
CPUID_TO_MODEL(cpuid)		(new)

	Return the display family and the display model.
	The macro names are the same as FreeBSD.

CPUID_TO_BASEFAMILY(cpuid)	(The old name was CPUID2FAMILY)
CPUID_TO_BASEMODEL(cpuid)	(The old name was CPUID2MODEL)

	Only for the base field.

CPUID_TO_EXTFAMILY(cpuid)	(The old name was CPUID2EXTFAMILY)
CPUID_TO_EXTMODEL(cpuid)	(The old name was CPUID2EXTMODEL)

	Only for the extended field.

See http://mail-index.netbsd.org/port-amd64/2013/11/12/msg001978.html
 2013-11-15 08:47:55 +00:00
msaitoh
3b5f820d76 Fix typo. From jnemeth. 2013-11-07 18:59:01 +00:00
msaitoh
a9491a8185 Update some processor names. 2013-11-07 18:18:59 +00:00
mrg
ea1cef97af avoid uninitialised variable use. 2013-10-30 08:42:16 +00:00
msaitoh
c622541618 Support prefetch size. 2013-10-28 05:41:49 +00:00
msaitoh
ea7bd36351 Check cpuid leaf 4 for newer Intel CPU to know the cache information. 2013-10-21 06:33:11 +00:00
msaitoh
0380541841 No functional change: 
- Add prototypes.
- Make some function static.
- Sort functions.
 2013-10-21 06:28:15 +00:00
msaitoh
4713a86712 Fix typo in comment (s/XRC0/XCR0/). 2013-10-04 17:12:48 +00:00
msaitoh
13add5607a Add shared TLB. 
KNF.
 2013-09-14 17:23:18 +00:00
msaitoh
993b96e7e8 Update Intel processors' brand names and model names (e.g. Atom C2000 and 
E3000) from the latest document.
 2013-09-13 06:21:43 +00:00
matt
edba670894 .include <bsd.own.mk> to get MACHINE_CPU 2013-08-01 23:19:39 +00:00
msaitoh
c148f0440f Update Intel's Processor Family Names of family == 6 from the latest document. 
Add 0x35(Atom), 0x36(Atom S), 0x3f(future Xeon), 0x46(Haswell) and update some
models.
 2013-07-16 09:54:30 +00:00
yamt
7f82ee6f97 print some more bits 2013-03-06 11:52:53 +00:00
matt
9ac4c42034 Add arm support for cpuctl identify 2013-01-31 23:40:48 +00:00
matt
c4936fc4a0 Only complain about binding if we have more than 1 cpu. :) 
(we always have more than 0).
 2013-01-31 19:47:59 +00:00
dsl
58b5bd2463 Add support for the xsave related data from cpuid 8.n. 
Reorder the output so that the 'brand' string - which actually identifies
  the cpu is output first.
 2013-01-07 23:20:42 +00:00
dsl
6d15685a79 Use full model number to index name strings - a lot of 256 element arrays 
don't matter in usespace.
Update list of intel family 6 model names (all current cpus) to include
everything upto and including sandy bridge and ivy bridge.
My i7 is no longer reported as a random P II.
 2013-01-06 23:17:35 +00:00
dsl
cbb941ff11 The Intel and AMD docs (more or less) agree on how the cpuid 'extended 
family' and 'extended model' bits are used to create larger values
  than the original 16bit value allowed for.
Calculate and save these values 'up-front' and use them throughout.
Untangle the (backwards) nested switch statement for amd 'model 15' cpus.
Works as badly as ever on my i7.
 2013-01-05 21:16:22 +00:00
dsl
cd90dce7d6 If the IOC_CPU_UCODE_GET_VERSION fails with ENOTTY, try issuing the 
request that the amd64 kernel understands.
 2013-01-05 16:38:12 +00:00
dsl
ef07d271f5 Fix x86_identify() for amd64 2013-01-05 15:33:00 +00:00
dsl
7d87936626 Change the i386 asm x86_identify() so it returns a value instead of writing 
into global data.
Fix a stack alignment fubar that would cause a crash on a cirix 486.
Refactor identify code to common setup for normal identify and ucode
identify - which was missing a memset().
 2013-01-05 15:27:45 +00:00
dsl
438bdb2a64 #include sys/ioctl.h 2013-01-02 19:24:30 +00:00