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319 Commits

Author SHA1 Message Date
scw
4e87eae834 Use Software Single Stepping for now when PPC_IBM4xx is defined. The 
existing hardware assisted method doesn't work on this cpu.

Also correct the "I_B" constant in db_machine.h.
 2002-12-20 15:23:12 +00:00
thorpej
a6dc36fa4e Build LKMs with -msoft-float. 2002-12-19 19:36:26 +00:00
thorpej
e8cc3884de Rename __LDPGSZ to AOUT_LDPGSZ, to accurately reflect what it is. 2002-12-10 17:14:02 +00:00
thorpej
78ea2dd367 Use __LDPGSZ (which must be == USRTEXT) as the text address for a.out 
executables, and eliminate the USRTEXT constant, which was only used
by the a.out exec code.
 2002-12-10 05:14:24 +00:00
scw
67d6f49379 Changes/additions to support evbppc. 2002-12-09 12:28:12 +00:00
manu
9f6565f2bd A working fork/vfork implementation. Darwin fork differs from our fork by 
two ways:
- the child gets its pid as retval[0] (userland stub will turn it into a 0),
retval[1] is 1 and it is 0 in the parent.
- in the child, the fork syscall is successful, hence we must skip the next
instruction.
 2002-12-08 21:53:10 +00:00
thorpej
a13469e728 Revert my previous GCC 3.3-related changes; GCC 3.3 has been fixed 
to handle our stdarg/varargs ABI for PowerPC.
 2002-12-04 17:42:51 +00:00
manu
dfa96ff4b3 Add signal delivery for the PowerPC. Everything is implemented except siginfo. 
The stack layout is observed from stack dumps on Darwin, so it should be
very accurate.
 2002-11-26 23:54:09 +00:00
lukem
0635de35a3 Remove KDIR=, since SYS_INCLUDE=symlinks and KDIR are not supported any more. 2002-11-26 23:30:07 +00:00
thorpej
3911a545e1 No newlines in string constants. 2002-11-25 01:36:35 +00:00
thorpej
11707809eb No newlines in string constants. 2002-11-25 01:31:12 +00:00
jdolecek
2ba45545df back previous off; don't install macho_machdep.h 2002-11-04 15:27:15 +00:00
matt
6d54e503b3 LP64 changes (copied from mips and changed CHAR_MIN/MAX to 0/0xffU). 2002-11-03 22:55:24 +00:00
matt
c89494d09b Change _MACHINE_foo_H_ to _POWERPC_foo_H_ 2002-11-03 22:36:22 +00:00
matt
6dc0eb390f Add LP64 bits (copied from MIPS). 2002-11-03 22:35:33 +00:00
matt
0d380378cf Add LP64 limits. 2002-11-03 22:23:59 +00:00
manu
fddf44c0bf Add COMPAT_MACH and EXEC_MACHO support on the PowerPC 2002-10-30 06:41:45 +00:00
manu
f9cac3b168 Changed the ifndef guard of this header file from _MACH_EXEC_H_ to 
_POWERPC_AOUT_EXEC_H_. The former was conflicting with
<compat/mach/mach_exec.h>.
 2002-10-28 18:00:40 +00:00
thorpej
4b68c83f09 Make these work with GCC 3.x. 2002-10-25 20:46:44 +00:00
matt
8c472e414b Move pte_spill calls from trap_subr to trap(). Count the number of 
"evictions" and avoide calling pmap_pte_spill if there are no evictions
for the current pmap.  Make the ISI execption use the default exception
code.  Remove lots of dead stuff from trap_subr.

Make olink use TAILQ instead of LIST and be sorted with evicted entries
first and resident entries last.  Make use of this knowledge to make
pmap_pte_spill do a fast exit.
 2002-10-10 22:37:50 +00:00
matt
b6b04cb00c In mftb(), make sure we say we are clobbering cr0. 2002-09-26 01:13:32 +00:00
simonb
63096043b3 Use "#define\t" instead of "#define ". 2002-09-22 08:30:56 +00:00
chs
c081614ea2 it really helps to get the stub right before cutting + pasting it 27 times. 
alas, I did not.  doh.
 2002-09-22 07:53:39 +00:00
chs
55e1f79335 add pmap_remove_all() hook (empty on most platforms so far). 2002-09-22 07:17:08 +00:00
gmcgarry
dca80f08fd Add __HAVE_MD_RUNQUEUE flag for MD code to override MI run queue primitives. 2002-09-22 04:11:32 +00:00
matt
45e5f68016 Allow MAXPHYS to be overriden. Increase the default MSGBUFSIZE to 2 pages. 2002-09-06 19:26:26 +00:00
matt
d2965f3ad3 Prepare for PPC64. Use register_t for mtmsr/mfmsr since the msr on PPC64 
is 64bits wide.  Define proper types for PPC64 if _LP64 is defined.
 2002-08-14 15:41:57 +00:00
matt
571dd402e2 Add a bunch of mpc8xx SPR definitions. 2002-08-14 15:38:40 +00:00
simonb
f0302072f1 Use "ibm4xx" instead of "galaxy"; galaxy was an early code name for the 
405GP.
 2002-08-13 05:43:24 +00:00
simonb
497d6762cf Split out device register definitions to their own files as the are 
common across many of the 4xx parts.  Leaves ibm405gp.h with device
address information specific to the 405GP CPU.  Now allows opb.c to
support multiple 4xx CPU types.
 2002-08-13 04:57:48 +00:00
simonb
95319edf4a Add some IBM 4xx CPU PVR values; sort PVRs numerically. 
White space nits.
 2002-08-11 13:33:00 +00:00
simonb
ef1df3654e Define the 4xx PVR values in one place only. 2002-08-11 13:32:20 +00:00
matt
549ac19770 Add IBM Power3 CPUID. 2002-08-10 21:38:06 +00:00
matt
0fb9cba190 Add SPR_ASR from OEA-64. Change mfspr to use register_t. 2002-08-08 22:49:09 +00:00
chs
0a97a311e2 it's PPC_HAVE_FPU, not PPC_HAS_FPU. 
also, include the headers that turn on FPU and AltiVec features
in case no one else does.
 2002-08-08 01:27:35 +00:00
tsubai
e373d8b520 Re-correct previous. It's intentional. 2002-08-07 08:01:57 +00:00
briggs
0b956d0b8b Implement pmc(9) -- An interface to hardware performance monitoring 
counters.  These counters do not exist on all CPUs, but where they
do exist, can be used for counting events such as dcache misses that
would otherwise be difficult or impossible to instrument by code
inspection or hardware simulation.

pmc(9) is meant to be a general interface.  Initially, the Intel XScale
counters are the only ones supported.
 2002-08-07 05:14:47 +00:00
matt
a2e9fe106d Correct __va_list typedef for GCC 3.* to match the GCC 3.* definition. 2002-08-07 00:11:59 +00:00
chs
2928d8ba05 actually we shouldn't hold kernel_lock while calling postsig(). 2002-08-06 06:18:24 +00:00
chs
0924752f24 add the MSSCR0 register and some more L2CR fields. 2002-08-06 06:17:50 +00:00
chs
461184c6b6 fix the calculation of the address of the IPI dispatch register. 2002-08-06 06:16:42 +00:00
chs
301f1ebf31 move more inlines to cpu.h: mftb(), mftbl() and mfpvr(). 
(the mftb() in pmap.c only wanted the lower 32 bits, so that's now mftbl()).
 2002-08-06 06:14:33 +00:00
chs
810cde53cc use a completely separate trap handler for syscall traps. 
this reduces syscall overhead by 10% to 20% depending on cpu type.
 2002-08-02 03:46:42 +00:00
matt
3e158de7c1 Don't define register references if not KERNEL or STANDALONE. 2002-07-30 06:09:10 +00:00
chs
03315186b6 install atomic.h. 2002-07-28 07:11:25 +00:00
chs
a7171ee431 add some atomic operations. 2002-07-28 07:09:28 +00:00
chs
fccc379b30 restructure the FPU and AltiVEC code so that it works for MP. 2002-07-28 07:07:44 +00:00
chs
84b41b2adb rearrange the PCB structure a bit so it's easier to look at in ddb. 2002-07-28 07:02:54 +00:00
chs
4b5a2a3f79 define CPU_INFO iterators so that the CPU-states sysctl works for MP. 2002-07-28 07:02:29 +00:00
matt
a660a9325f Set normal memory PTEs with PTE_M (memory coherent). Change how we 
remember the "exec"ness of a page.  If a managed page is pmap_enter'ed
with VM_PROT_EXECUTE, remember that it's an "exec"page.  Such that when
additional mapping are performed, no synch'ing of the I-cache is needed.
Revoke "exec"ness when the page is mapped into the kernel with VM_PROT_WRITE
or the pmap_page_protect is called with VM_PROT_NONE.
 2002-07-25 23:33:04 +00:00