5006dbf868
cpu_set_kpc() prototype is already in <sys/systm.h>.
1998-10-05 22:11:15 +00:00
40beab6ad6
If a lock is held do not spin in a read/write loop but just read the lock
...
until it is released. This is easier on the bus cache coherency logic.
1998-10-05 19:58:19 +00:00
b4dba57069
Footbridge based kernels do not need constab.
1998-10-05 16:03:04 +00:00
e605a01dce
Footbridge based kernels don't use dev/cninit.c
1998-10-05 15:41:19 +00:00
550ee6b308
rename getprop routine to avoid conflict with the one in bsd_openprom.h
1998-10-05 07:13:07 +00:00
ddde128de9
Track compat/linux/arch/* reorg.
1998-10-05 05:55:35 +00:00
8778509c45
* Make cpu_identify() routine table-driven.
...
* MIPS3 sanity check now allow MIPS1 models to boot.
1998-10-05 05:26:00 +00:00
b9fef4b8ad
The 2-disk install floppy allows us to add:
...
* 3000-series CPU support, plus all the tc devices
* 4100-series CPU support
* misc SCSI HBA support (removed earlier for space reasons)
1998-10-05 05:04:46 +00:00
5d9338a24b
Don't put the fcom device in constab.
1998-10-05 02:46:31 +00:00
664d0f374c
Base configuration for CATS kernels.
1998-10-05 02:43:43 +00:00
35f31dce6e
Implement consinit() here instead of using the arm32/machdep.c version.
...
Use information passed from via the boot arguments to determine which
device to use as the console.
Add support for initialising the CATS ISA subsystem.
During the early bootstrapping use fcomcnattach()/fcomcndetach to enable
debug and diagnostic information to be sent to the diagnostic serial
port. This is only used during the early part of initarm() until things
have been relocated and the real console can be initialised().
1998-10-05 02:40:26 +00:00
8909a4e529
Define both EBSA285 and CATS bootinfo structure magic numbers.
1998-10-05 02:36:49 +00:00
4d8d0f4e6d
Define fcomcnattach() and fcomcndetach() functions for the diagnostic
...
serial port.
Disable the old probe and init functions as we no longer use constab and
cninit().
1998-10-05 02:36:02 +00:00
0d3d74ceeb
Footbridge based systems don't use cninit() so don't use the version of
...
consinit() defined here.
1998-10-05 02:33:46 +00:00
c9937d0234
cleanup.
1998-10-05 02:01:57 +00:00
9f317a1a9d
Add syncicache after text loading.
1998-10-05 01:58:03 +00:00
86a0875460
Add dsrtc device and associated file.
1998-10-05 01:21:39 +00:00
f452e15aff
Add a driver for the Dallas Semiconductor RTC found on CATS motherboards.
1998-10-05 01:20:57 +00:00
18ccba3b4e
Make sure ISA interrupts have been setup prior to configuring devices.
...
This is not nice and a better solution is needed. Really this should be
done when the PCI-ISA bridge is discovered but it is possible that
some PCI interrupts may be routed via the ISA interrupt controller
and thus this needs setting up first.
1998-10-05 01:17:55 +00:00
91eeeff347
Add support for interrupts that are actually routed via an ISA interrupt
...
controller.
(I'm not happy with this approach but it works so I'll use it for the
moment until I complete run-time selection of the interrupt handling based
on recognised hardware).
1998-10-05 01:09:38 +00:00
197c78db08
Prototype isa_intr_alloc() (Needed by ISA PnP code) and sysbeep().
1998-10-05 01:05:00 +00:00
100a13e50a
Add ISA legacy mode support. Currently this is used by CATS kernels
...
which routes the PCI IDE interrupts in a similar fashion to i386 machines
(i.e. on ISA irq14 & 15).
1998-10-05 01:03:52 +00:00
dda219af66
Add file arm32/isa/isa_cats_machdep.c.
...
Build isa/isa_io.c and isa/isa_io_asm.S for both SHARK and ISA systems.
1998-10-05 01:01:43 +00:00
c2d2dca344
Initial commit of ISA bus support for CATS machines (DC21285 based
...
motherboards).
1998-10-05 01:00:57 +00:00
60e0cbbab8
Use sysbeep() rather than beep_generate for consistancy and the sysbeep
...
device.
KNF a chunk of this file.
1998-10-05 00:53:47 +00:00
67d78e486f
Remove beep related stub code now we have a sysbeep device.
1998-10-05 00:51:21 +00:00
4a1b880605
Add files.usb. It should work.
1998-10-05 00:49:15 +00:00
8eca271694
Add sysbeep device.
1998-10-05 00:49:13 +00:00
ae4624b175
Add sysbeep device with ISA and VIDC attachments.
1998-10-05 00:44:45 +00:00
6f5d4c52a1
sysbeep device attachments for vidc based audio systems.
1998-10-05 00:42:41 +00:00
5f37409d37
Implement sysbeep device for ISA systems. This just hooks into the pcppi
...
code.
1998-10-05 00:41:31 +00:00
20122120a2
Add arm32/isa/joy_isa.c and arm32/isa/joy_isapnp.c
1998-10-05 00:39:44 +00:00
5fe09f2a80
Add ISA and ISAPNP attachments for joysticks.
1998-10-05 00:35:40 +00:00
ec897ee047
Fix a problem reported by Michael Hitch. Basically, our libc relies on the
...
non-standard way of invoking sigreturn, specifically a side-effect that I
overlooked. Thus, longjmp's return value was getting clobbered.
Sigh, so burn trap #3 just as sigreturn.
XXX We need an SVR4-style {get,set}context(2) to avoid wasting new
XXX trap vectors in the future.
1998-10-05 00:00:17 +00:00
c1e5866bbe
Fix a typo in a comment.
1998-10-04 23:56:17 +00:00
c01f29bdf1
Sigh, we are going to have to burn a vector for Just Sigreturn again,
...
for now, until we have a more generic {get,set}context(). Update the
comment for trap #3 accordingly.
1998-10-04 23:38:55 +00:00
7a9e6fd3f7
Remove dead FPE option.
1998-10-04 19:03:37 +00:00
e6145e36a2
Correct Linux compat include file names.
1998-10-03 23:38:32 +00:00
2b727ad9e9
The linux compat i386 "files" file moved into arch/
1998-10-03 23:17:03 +00:00
acce9b3b1b
Make this compile again when DEBUG is defined.
1998-10-03 21:58:52 +00:00
49a45fed9b
If the memory range of the machine is such that no bouncing is necessary,
...
or if the device is capable of 32-bit DMA (specified by ISABUS_DMA_32BIT),
clear the map's bounce threshold at map creation time.
1998-10-03 21:53:04 +00:00
01a1588265
Initialize the DMA map's bounce threshold to the tag's at map creation time,
...
and use the map's threshold when loading the map.
1998-10-03 21:38:48 +00:00
10557b15d7
Add a private bounce threshold to the DMA map, initialized in a bus-dependent
...
fashion.
1998-10-03 21:24:00 +00:00
c0f54daf70
Add em_alpha_exp
1998-10-03 18:17:14 +00:00
e24d09740e
call gate for solaris-2.6 syscalls [from frank]
1998-10-03 18:08:39 +00:00
36f308f4cc
Add an LDT for Solaris-2.6 syscalls [from Frank]
1998-10-03 18:05:25 +00:00
787fcfeac7
copyright has been assigned to TNF, update notice
1998-10-03 02:14:30 +00:00
66d6e30a1b
Yet another workaround for pmap bugs. Several reports on the port-amiga
...
list claim this helps with some big-machine situations.
1998-10-02 19:29:49 +00:00
41c0179c3c
use old sigmask in sigcontext and old sigreturn syscall in Ultrix
...
emulation mode
1998-10-02 19:25:33 +00:00
18a5d4ffc6
set up old style sigmask on COMPAT_ULTRIX too
1998-10-02 18:59:56 +00:00
5bcf824ff0
change debugging output in compat_13_sigreturn to distinguish from native
...
sigreturn
1998-10-02 18:49:00 +00:00
a366b483ec
compat_13_sigreturn is needed for compat_ultrix too
1998-10-02 18:46:58 +00:00
4345019cc0
implement a separate ultrix_sigcode[]
1998-10-02 18:44:32 +00:00
a30987cbf6
Re-arrange networking options a bit (Julian Coleman)
1998-10-02 12:50:35 +00:00
c5aade90a8
Oops, ofppc don't have wscons.
1998-10-02 07:12:25 +00:00
ab915f7483
Oops, missing immediate qualifier, pointed out by Chas Williams.
1998-10-02 02:02:46 +00:00
e19b4629ab
Use wd.h, not wdc.h -- we are checking for the presence of disks, not
...
controllers. (there may be a controller which has only an atapibus
but no wd disks).
1998-10-02 01:37:51 +00:00
78492e307a
If not MULTIPROCESSOR then identify the interrupt target cpu by hwrpb id (%d)
...
rather than attachment name, and hence avoid referencing `cpus'.
1998-10-01 22:57:30 +00:00
0bf5ff6ade
make this compile with DIAGNOSTIC again.
1998-10-01 21:26:55 +00:00
49c778c3b5
Use __LIBC12_SOURCE__, not __LIBC12_SOURCE :-)
1998-10-01 21:16:06 +00:00
9e2b536bef
Update for signal changes.
1998-10-01 20:41:29 +00:00
8253135408
Update for bcopy/bzero -> memcpy/memset changes.
1998-10-01 20:05:09 +00:00
c37cc930f4
Fix a couple of printf formats.
1998-10-01 19:08:05 +00:00
cfd3302aa1
Need more room for signal mask
1998-10-01 19:00:06 +00:00
33dacac36e
linux_machdep.h has moved.
1998-10-01 18:32:33 +00:00
b0367216c1
Macros to call a linux syscall.
1998-10-01 16:19:59 +00:00
79a9d0776d
Add linux compat includes.
1998-10-01 16:18:53 +00:00
b9e8494b1d
Add linux signal trampoline code.
1998-10-01 16:18:46 +00:00
d954a84b41
Linux emul_* structures chahged names.
1998-10-01 15:53:33 +00:00
ce58a65013
Sync comments for REALBASEMEM/REALEXTMEM with GENERIC.
1998-10-01 10:01:20 +00:00
ed03ee06e1
Update for signal changes.
1998-10-01 08:28:30 +00:00
502a65c40d
Add linux real-time signal trampoline.
1998-10-01 04:37:15 +00:00
8ada127535
Path to linux_machdep.h changed.
1998-10-01 04:36:05 +00:00
6a0907d521
linux_machdep.c has been moved. It is now included from compat/linux/i386/files.linux_i386.
1998-10-01 04:34:54 +00:00
c5b8d42e66
Need 14 longs for jmp_buf now (sigcontext has 128-bit signal mask at the
...
end).
1998-10-01 03:28:11 +00:00
d15a64c38b
Adapt to signal changes.
1998-10-01 02:53:53 +00:00
ccea47d790
Moved to compat/linux/i386/linux_machdep.h.
1998-10-01 02:20:52 +00:00
3466d00034
Moved to compat/linux/i386/linux_machdep.c.
1998-10-01 02:15:50 +00:00
358521eba1
add prototype for bioscall()
1998-10-01 02:00:37 +00:00
586b0b3d1b
Implement compat_13_sys_sigreturn().
1998-10-01 01:03:56 +00:00
379c9be4a8
More patches for ARC from Noriyuki Soda:
...
* commit isapnpvar.h changes required for ARC to support plain isa.
* fixup mistake over mips/include/cpuregs.h.
* mips/mips_machdep.c:
set L2 cache-size for arc, cleanup use of L2cache present
vs L2 cache-size variables. check for no L2 cache on kernels
configured to require one. misc cleanups.
* mips/mpis/trap.c: more locore stack-traceback label cleanup.
XXX Locore callbacks for mips3, mips4, r4600 cacheflush need more work.
1998-10-01 00:42:37 +00:00
8b220e1148
Define SYS_compat_13_sigreturn13.
1998-10-01 00:29:51 +00:00
ae2fcdc40a
Oops, typo.
1998-10-01 00:22:02 +00:00
c227be8efc
Expect the syscall number to push to be in register d0.
1998-10-01 00:11:11 +00:00
fa582abe7f
Move trap #1 and trap #2 handlers here. Trap #1 handler now places
...
the cpmpat_13_sigreturn13 syscall number into d0 before calling the
sigreturn stub.
1998-09-30 23:52:32 +00:00
bcf14a99e2
Garbage collect trap #1 and trap #2 handlers; they're moved to
...
trap_subr.s
1998-09-30 23:47:33 +00:00
1e62485c23
If !COMPAT_13, make trap #1 produce an illegal instruction. Fix the comment
...
for trap #2 to reflect that it's the trace trap.
1998-09-30 23:13:58 +00:00
a11e6632a8
Pull in opt_compat_netbsd.h
1998-09-30 23:01:28 +00:00
db9f3cbe30
Use the new special syscall entry point, and specify SYS___sigreturn14.
...
Makes the sigcode grow by 4 bytes.
Note that we are no longer able to use the HP-UX breakpoint "sigcodetrap"
hack here, as a result. This means that BSD programs can no longer be
debugged by HP-UX debuggers. *Sniff* Don't break my heart...
1998-09-30 22:38:17 +00:00
f52431f2a3
Use the symbolic constant SYS_exit.
1998-09-30 22:26:28 +00:00
35d282c8d5
Make sure SYS_exit and SYS___sigreturn14 are defined. Garbage collect
...
SYS_sigreturn.
1998-09-30 22:23:13 +00:00
38084c6615
Note that trap #1 is compat_13_sigreturn, and give trap #3 to syscalls
...
which require special handling, e.g. sigreturn on m68k.
This differs from the old sigreturn trap in that we require the syscall
number to be in register d0, just like the regular syscall entry point.
This will allow sigreturn to be versioned in the future without the need
to allocate another trap vector.
1998-09-30 22:14:11 +00:00
1ce207046d
Adapt to signal changes.
1998-09-30 21:55:02 +00:00
aaec09ab91
Pull in <m68k/frame.h> if __M68K_SIGNAL_PRIVATE, for sigstate.
1998-09-30 21:52:45 +00:00
f6ea7521d7
Put the sigstate and sigframe definitions in signal.h, protected by
...
__M68K_SIGNAL_PRIVATE.
1998-09-30 21:04:48 +00:00
777ffc95a2
Fix a small type in sendsig.
...
Fix some esym typeclash lossage.
1998-09-30 20:20:03 +00:00
5267ada16a
use __sigreturn14 in sigcode.
1998-09-30 20:17:29 +00:00
d067796204
config doesn't like c-style comments.
1998-09-30 20:16:17 +00:00
f382e91b5e
Add a field to identify the processor that has a process' FPU context.
1998-09-30 18:40:58 +00:00
6530a14556
Typo.
1998-09-30 18:40:04 +00:00
4826aac9cf
Make the current FPU owner (`fpproc') a per-CPU entity. Unresolved issue
...
as yet: lazy FPU context switching may require co-operation from other
CPUs.
1998-09-30 18:38:57 +00:00
c0b9fc5616
Make kernel compile after recent signal changes.
1998-09-30 14:09:59 +00:00
21adfe5c18
Oops, brain'o.
1998-09-29 23:45:25 +00:00
cf95587273
Sync with GENERIC.
1998-09-29 23:18:57 +00:00
16b0d8f1e4
Disable the code that halts secondary processors in cpu_reboot(). Halting
...
the secondary works, but not when called from here?! XXX!
1998-09-29 21:59:33 +00:00
ce57c93ef5
some temporary debugging printfs in the IPI code.
1998-09-29 19:40:33 +00:00
fb345194ad
document CLOCK_COMPAT_OSF1
1998-09-29 18:25:54 +00:00
70d1e71ea0
Allow to use the RTC chip in a way compatible to OSF/1: use an offset
...
of 52 years between RTC and UNIX time.
This is controlled by "option CLOCK_COMPAT_OSF1".
1998-09-29 18:23:55 +00:00
88b626a585
make compile w/o MULTIPROCESSOR
1998-09-29 15:55:47 +00:00
55df520938
Can't use -traditional; __RENAME() breaks due to a limitation in the
...
"traditional" C preprocessor.
1998-09-29 08:28:20 +00:00
5a5380b92b
This program is icky, and will die soon. So, don't put a whole lot of
...
effort into it, but make it build again by casting the second arg to signal().
1998-09-29 08:27:36 +00:00
005af97f9e
Use "print-objdir".
1998-09-29 08:16:11 +00:00
69d81d8df1
Prototype cpu_halt_secondary().
1998-09-29 07:07:36 +00:00
30e4de5632
In cpu_reboot(), halt the secondary CPUs.
1998-09-29 07:07:09 +00:00
1b8e855f2a
First try at a HALT interprocessor interrupt handler.
1998-09-29 07:06:02 +00:00
94b97dce9b
CPUF_HATCHED is dead, replaced by cpus_running bitmask.
1998-09-29 07:05:30 +00:00
99698d1a1a
- Use a bitmask for "running CPUs", rather than a flag in the softc.
...
- Add a function to halt a secondary CPU.
- Enable interrupts on secondary CPUs once they've hatched.
1998-09-29 07:04:58 +00:00
469f020ae3
Don't process CLOCK or DEVICE interrupts if we're not the primary CPU.
1998-09-29 07:02:04 +00:00
30ec5015b1
In exception_return(), if MULTIPROCESSOR, skip software interrupts, ASTs,
...
and floating point handling if we're not the primary CPU.
1998-09-29 07:01:16 +00:00
392a96cc91
Define the offset of hwrpb->rpb_primary_cpu_id.
1998-09-29 06:22:09 +00:00
ce9e4beacf
Simplify the asm constraints in mrg_aline_super(), in order to
...
less thoroughly confuse the compiler when used without -O. Fixes
PR 5496.
1998-09-29 05:24:08 +00:00
183f609c83
- Do not set TLCPUMASK on non-I/O nodes. That register exists only on
...
I/O nodes. Previous code erroneously set it on CPU nodes only.
- In both the single- and multi-processor case, route all interrupts from
I/O nodes to the primary CPU, for now.
1998-09-29 04:22:36 +00:00
3c2e2c8622
This should need opt_execfmt.h.
1998-09-28 23:42:48 +00:00
4c2e179b93
PROM doens't need to be mapped to start up the secondaries, so remove some
...
dead code.
1998-09-28 22:21:13 +00:00
9bd45385a9
Turn off some debugging printfs, and kludge around a boot block bug until
...
I can install fixed boot blocks on my MP test systems.
1998-09-28 21:50:32 +00:00
705cac105e
Invalidate the TB and I-stream upon entry, and fix a typo in the wrkgp call.
1998-09-28 21:48:50 +00:00
34a8ac8484
Set the primary CPU's PAL revision to the OSF/1 PAL revision after switching
...
to it, per the Green Book (pointed out by Chris Demetriou).
1998-09-28 21:21:55 +00:00
5caecb6ae0
Fix for some EGCS warnings.
1998-09-28 21:18:55 +00:00
fd24065cb5
pcvt is no longer used with bebox.
1998-09-28 09:49:49 +00:00
4a04e5038e
pcvt is no longer used with bebox.
1998-09-28 09:33:12 +00:00
e30046b37d
This was a copy of an very old editing error in the amiga pmap.c....
...
(Ignatios Souvatzis)
1998-09-28 07:51:23 +00:00
980b2b416f
fix PMAP_ACTIVATE_ASN_SANITY() arguments
1998-09-27 17:23:25 +00:00
8c29324cc7
Kernel configuration with multi-processor support.
1998-09-27 15:10:25 +00:00
a965fe73b1
Add support for the TFL LAN Inc. E410/E420 PDS cards. Based on code
...
from Ken Nakata in PR 6199, which was in turn derived from code from
Haru Maruyama <h-maru @ da2.so-net.ne.jp>.
1998-09-27 14:39:11 +00:00
0a090af2c7
Add `ldstub()'.
1998-09-27 14:32:14 +00:00
e6ce8bcfc7
sparc spin lock functions.
1998-09-27 14:31:18 +00:00
b7f86e40fa
The smallest positive normalized number in extended precision is 2^-16383.
...
Underflow handling is different from i387.
1998-09-27 04:54:49 +00:00
463301afbf
Use common date conversion functions - not runtime efficient, but
...
brain-efficient...
1998-09-26 21:02:56 +00:00
1826b0bca2
Use the RTC chip as time-of-year clock, as the PROM console and Ultrix do.
1998-09-26 20:59:42 +00:00
0a1a6fb7e0
This file is no longer used
1998-09-26 20:51:45 +00:00
166c2a5fa5
fix typo
1998-09-26 20:15:59 +00:00
9f352b7e15
Stop all other CPUs upon entering a debugger.
1998-09-26 20:14:48 +00:00
01e64c640c
Implement mp_pause_cpus() and mp_resume_cpus(): pause and resume all
...
CPUs except the one running this code.
1998-09-26 20:13:56 +00:00
6ad3a051e8
mp_{pause,resume,halt}_cpu() prototypes.
1998-09-26 20:12:06 +00:00
6eb98a7967
4/NPTEPG is 0. This is a very old editing error.
1998-09-26 19:26:58 +00:00
029ab07a4d
delint
1998-09-26 19:21:19 +00:00
8ddcd514a6
Use CPU start function in obp.c
1998-09-26 19:09:56 +00:00
fe1cf94b9f
Add wrappers for PROM's CPU start/stop functions.
1998-09-26 19:08:09 +00:00
a89a10c394
Add file obp.c
1998-09-26 19:06:47 +00:00
43c1cb852c
Move PROM interface prototypes into openprom.h
...
Use the `openprom_addr' structure for passing around physical addresses.
1998-09-26 18:20:19 +00:00
09a4cf6caa
Move PROM interface routines into their own file.
1998-09-26 18:15:34 +00:00
d208510692
Add support for AdvanSys Ultra Wide boards
1998-09-26 16:38:43 +00:00
87fab23d68
make it compile with DEBUG
1998-09-26 10:07:36 +00:00
b356238b16
Add one more new MIPS processor PRid 0x30 for IDT RC64474/64475. These
...
are successors of RC4640/RC4650, but fully brewed MIPS, then capable of
running NetBSD/mips.
1998-09-26 08:16:38 +00:00
7af1966350
Regenerate from podules.
1998-09-26 03:30:50 +00:00
3da75bb55d
Update the list of MIPS processor revision ID. PRids of Toshiba TX3900
...
and QED R4650 comflict each other.
1998-09-26 03:29:37 +00:00
a96d8e733a
Add EESOX manufacturer ID and SCSI2 podule ID.
1998-09-26 03:29:36 +00:00
2c50ec242f
Add basic interprocessor interrupt sending and receiving code. Current
...
IPI functions: HALT, IMB, TBIA, TBIAP.
XXX HALT is not yet implemented, it's just a stub.
1998-09-26 00:03:51 +00:00
78d445810b
Add an interprocessor interrupt bitmask to the cpu_softc, and publicize
...
the cpus[] array.
1998-09-26 00:01:17 +00:00
1f4921edce
- Oops, forgot to initalize the cpu_softc simplelock.
...
- Add yet another debugging printf.
1998-09-26 00:00:33 +00:00
e2aa38459c
Implement atomic quadword load-and-latch.
1998-09-25 23:59:42 +00:00
01c75223d7
Minor style tweaks.
1998-09-25 22:06:33 +00:00
eb8de83739
`eccmemctl' inadvertently got into the `mandatory' list.
1998-09-25 11:40:16 +00:00
d3ce2be01c
Don't bother printing the message from the secondary console. All it is
...
is basically the acknowledgement of the START command. Print the idle
USPACE address for now. Use the alias "apcb_backup_ksp" when setting the
backup kernel stack pointer in the secondary's boot HWPCB.
1998-09-25 03:23:50 +00:00
57e656b2ec
The processor unique value in the PCB is used as a backup kernel stack
...
pointer when booting secondary CPUs. Add an alias for it.
1998-09-25 03:21:31 +00:00
3ea9247ac8
GENERIC config file + MULTIPROCESSOR + some debugging stuff.
1998-09-25 00:46:09 +00:00
fcb0203141
First-cut at code to spin up secondary processors on a multiprocessor
...
Alpha system, conditional on MULTIPROCESSOR.
NOTE: This does not yet work completely. The secondary CPU begins the
boot process, but never makes it into the cpu spinup trampoline. This
is merely a snapshot of a work-in-progress.
1998-09-24 23:28:17 +00:00
feb1d22dcc
NCPU > 1 -> MULTIPROCESSOR
1998-09-24 23:00:43 +00:00
3cde5f5817
Machine-dependent spin lock operations for Alpha, included if MULTIPROCESSOR
...
is specified.
1998-09-24 22:32:35 +00:00
91a031471d
Implement atomic test-and-set for longwords (32-bit).
1998-09-24 22:22:07 +00:00
1b04ff4897
Make prom_enter() and prom_leave() public.
1998-09-24 21:18:13 +00:00
ba6d13d876
Use the primary CPU ID on console_restart(), not hard-coded 0.
1998-09-24 21:12:43 +00:00
27569e4050
Initialize pointer to the boot CPU's interrupt register.
1998-09-24 20:38:43 +00:00
831354d6de
Add `intreg' cpuinfo offset.
1998-09-24 20:37:17 +00:00
e43333b7e7
Move if_ade* from alpha/pci/ to alpha/a12/
1998-09-24 05:36:05 +00:00
09c3723e08
Put back ahc and bha scsi HBA driver configs.
1998-09-24 05:33:41 +00:00
81ea242049
Fix include path, these days a12 header files are in alpha/a12.
1998-09-24 05:32:52 +00:00
ec4de2679b
Track tfs -> ustarfs change.
1998-09-24 05:23:58 +00:00
c69dbb3c28
Actually, yes we do know what the rpb_restart entry point is used for,
...
so delete some #if 0'd code.
1998-09-24 03:39:24 +00:00
7521c309df
When setting up the hwrpb for restarts, use the primary CPU ID from the
...
hwrpb.
1998-09-24 00:30:19 +00:00
7df5ebc392
"Gee, there was already a function to do that."
1998-09-23 22:02:21 +00:00
53d42701b5
Implement a function to recompute the HWRPB checksum.
1998-09-23 21:51:04 +00:00
86f044d10e
Track changes elsewhere in the PCI interface.
1998-09-23 21:20:55 +00:00
55714d5b34
Update for vm_offset_t, vaddr_t sweep.
1998-09-23 21:17:17 +00:00
ddde99135e
A12 crossbar switch driver.
1998-09-23 21:14:58 +00:00
73fdd29a64
A12 detached console tty driver and NetBSD console interface.
1998-09-23 21:14:02 +00:00
58ab38cb69
Use per-CPU interrupt status register.
1998-09-23 11:07:28 +00:00
9eca565a37
Make cgsix_sbus & cgsix_obio dependent on their respective attribute.s
1998-09-23 08:49:46 +00:00
d6746389a4
The nmi_* routines are sun4m-only.
1998-09-23 08:44:51 +00:00
d720002637
Fix a typo in RCS keyword.
1998-09-22 16:23:20 +00:00
7c4c19c768
First pass KNF. This probably needs more work.
1998-09-22 16:01:51 +00:00
aa1cf01930
Express per-processor interrupt registers in a C structure as well.
1998-09-22 13:42:26 +00:00
bd37118769
Dup header.
1998-09-22 13:41:03 +00:00
eca50c1c33
Flush cache after diddling with trap vectors.
1998-09-22 13:40:08 +00:00
1186ba5102
Introduce a `flush entire cache' method.
1998-09-22 13:39:19 +00:00
5afb0e8bcb
Keep the per-processor interrupt status in the cpuinfo structure.
...
For now, map them to the fixed virtual addresses set up early in autoconf.c
1998-09-22 13:08:44 +00:00
5fa16c668b
Define the inter-console communication buffer portion of the per-cpu
...
info structure.
1998-09-22 08:16:51 +00:00
ec49dd71dd
Change 41 separate printf()'s into a table and 2 printf()'s.
1998-09-22 06:24:26 +00:00
6871d2529f
Add missing mb ops.
1998-09-22 06:10:53 +00:00
402a9210a2
Implement quadword atomic test-and-set.
1998-09-22 05:56:52 +00:00
thorpej