4e8a77d890
clean up disassembler code.
2002-05-10 15:27:05 +00:00
55326aaa7e
remove COMPAT_13 staff. No 1.3 release of sh3 port. these are trace of
...
i386 port.
2002-05-10 15:25:12 +00:00
3a1a0b37af
IOM_RAM_BEGIN is changed to specify physical address.
2002-05-09 12:32:09 +00:00
cee1a2f41a
remove unused macro.
2002-05-09 12:31:38 +00:00
2ca56b0d33
remove postsig. postsig is called by ast().
2002-05-09 12:31:19 +00:00
d5020bf906
remove obsolete interface. add defines for inquire cache feature.
2002-05-09 12:30:45 +00:00
44b57799f2
fix comment
2002-05-09 12:30:11 +00:00
4c73523c72
suitable for SH3/SH4 memory architecture.
...
support non-contiguos memory banks.
2002-05-09 12:29:48 +00:00
c34e1b1ad5
adapted to pmap and exception code changes.
2002-05-09 12:29:16 +00:00
5cf2727a95
new pmap designed for SH3/SH4.
2002-05-09 12:28:08 +00:00
bf93dc9b4c
remove obsoleted functions. add sh_tlb_update() for update TLB.
...
MMU mode is changed to multiple virtual storage mode for new pmap code.
2002-05-09 12:27:04 +00:00
fa6d5570e7
fix ASID mask define
2002-05-09 12:26:16 +00:00
944192661c
s/trapno/expevt/ for clarity.
2002-05-09 12:25:41 +00:00
d610fecf0f
rework general exception, and TLB exception handling for new pmap.
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all exception staffs are moved to exception.[ch]
2002-05-09 12:24:19 +00:00
a19e4685f7
Make CLKF_INTR() slightly less broken. The previous definition always
...
tested true if the CPU was running in the kernel at the time of the clock
interrupt, therefore all such time (kernel and idle) was counted as interrupt
time. The new definition simply punts on trying to count interrupt time,
which allows us to see kernel and idle time.
2002-05-07 04:01:59 +00:00
3a3df0d1d2
Fix reading values mapped in P1 via /dev/kmem (problem uncovered by
...
uch's new pmap).
2002-05-07 03:28:25 +00:00
7eaf6db5bd
remove #if 0 #endif
2002-04-29 09:33:30 +00:00
01eebf7a36
KNF.
2002-04-29 09:32:56 +00:00
6d338ff407
Use "#define<tab>", white space nits.
2002-04-28 17:10:32 +00:00
c67dc60a0a
add missing postsig() call.
...
I don't know whether this is true fix or not.
2002-04-28 12:51:14 +00:00
ccc0ee640f
add missing softintr_establish() call.
2002-04-28 11:38:48 +00:00
271b97bb3b
add SH4 Processor Version Register
2002-04-26 11:56:02 +00:00
f6bf722a2e
fix around PTR and PDR
2002-04-26 10:22:53 +00:00
0465d9b191
add missing SCPDR_SCP0DT definition
2002-04-25 20:17:04 +00:00
14fff32a83
remove duplicated SH3, SH4 define.
2002-04-23 13:59:03 +00:00
d1b9873090
make these compile with gcc -O0
2002-04-22 18:57:43 +00:00
c3050006aa
* Defflag the SH3 and SH4 options.
...
* In <sh3/cputypes.h>, always define both SH3 and SH4 if _LKM is defined.
2002-04-20 19:59:11 +00:00
5f10da67a7
Define all CPU types if _LKM is defined.
2002-04-16 17:33:56 +00:00
cb4570f5f5
remove obsolete functions, decralations and structure.
2002-04-04 18:12:23 +00:00
55aa2c46b9
sync with i386/include/pmap.h rev. 1.45:
...
make dangerous pmap_copy() and pmap_move() no-op.
2002-04-03 10:38:51 +00:00
66227882a3
sync with i386/i386/pmap.c rev. 1.94:
...
make dangerous pmap_copy() and pmap_move() no-op.
2002-04-03 10:37:48 +00:00
dade289395
add uvmexp.intrs++
2002-03-28 15:34:20 +00:00
0ae715f6d2
All the sh3 ports had an identical procfs_machdep.c, so use a common
...
file under arch/sh3/sh3.
2002-03-27 10:44:38 +00:00
e0a7781fc7
avoid accounting errors in pmap_enter() by only updating the counters
...
once the operation can no longer fail. fixes PR 16028.
2002-03-27 04:47:28 +00:00
7803620f8d
mmeye specific devices are moved to mmeye/dev
2002-03-24 18:08:42 +00:00
24ec477a45
Rework interrupt code.
...
+ Fully utilize SH SR.I[0:3] interrupt level.
+ software interrupt is emulated by TMU1, 2 one shot interrupt.
+ implement generic soft interrupts.
+ implement clockframe correctly.
2002-03-24 18:04:39 +00:00
50fcaf7ba0
add cpu device.
2002-03-24 18:01:29 +00:00
049c84193e
shb device is integrated to sh3/dev/shb.c and clean up locators.
2002-03-24 18:00:41 +00:00
731150d9ce
add SH7750S IPRD register define
2002-03-24 17:57:33 +00:00
7ffd9429a4
s/PS_STRINGS/p->p_psstr/, as requested by christos
2002-03-18 17:00:20 +00:00
31144d9976
Convert ioctl code to use EPASSTHROUGH instead of -1 or ENOTTY for
...
indicating an unhandled "command". ERESTART is -1, which can lead to
confusion. ERESTART has been moved to -3 and EPASSTHROUGH has been
placed at -4. No ioctl code should now return -1 anywhere. The
ioctl() system call is now properly restartable.
2002-03-17 19:40:26 +00:00
93da9db963
cosmetic changes, fix comments.
2002-03-17 17:55:22 +00:00
1080799576
change to per-process AST.
2002-03-17 14:06:38 +00:00
57918e656a
add kernel stack debug option.
2002-03-17 14:05:47 +00:00
02add6730a
reserve wired entries for kernel stack.
2002-03-17 14:04:18 +00:00
3900e66164
add kernel stack and trapframe debug command.
2002-03-17 14:03:55 +00:00
9e6153d985
remove obsoleted functions.
2002-03-17 14:03:34 +00:00
b4b9d38675
zero clear all TLB entry to avoid unexpected VPN match.
2002-03-17 14:03:09 +00:00
1e6e3f896d
write-through mode for now. since SH4 kernel access page table via P2. XXX
2002-03-17 14:02:43 +00:00
4c6260b9de
kernel stack fix. old code simply P3 address converted to P1, it
...
caused memory destruction when kernel stack grow over 1 page. new
code use P3 address for kernel stack. but for the sake of debug, P1
kernel stack mode remain.
2002-03-17 14:02:03 +00:00
640a59b952
catch-up with stackgap change.
2002-03-16 20:45:43 +00:00
9fe7f9402f
only comments may follow #endif on a line.
2002-03-16 05:27:53 +00:00
9a0d81c6cc
use IOM_RAM_BEGIN macro instead of ram_start.
2002-03-10 07:46:51 +00:00
672baca18b
proc0 and page table intialize routines are moved to sh3_machdep.c
2002-03-10 07:46:12 +00:00
f9201a1606
common part are moved to sh3/include/param.h
2002-03-10 07:45:31 +00:00
a180cee23b
Pool deals fairly well with physical memory shortage, but it doesn't
...
deal with shortages of the VM maps where the backing pages are mapped
(usually kmem_map). Try to deal with this:
* Group all information about the backend allocator for a pool in a
separate structure. The pool references this structure, rather than
the individual fields.
* Change the pool_init() API accordingly, and adjust all callers.
* Link all pools using the same backend allocator on a list.
* The backend allocator is responsible for waiting for physical memory
to become available, but will still fail if it cannot callocate KVA
space for the pages. If this happens, carefully drain all pools using
the same backend allocator, so that some KVA space can be freed.
* Change pool_reclaim() to indicate if it actually succeeded in freeing
some pages, and use that information to make draining easier and more
efficient.
* Get rid of PR_URGENT. There was only one use of it, and it could be
dealt with by the caller.
From art@openbsd.org .
2002-03-08 20:48:27 +00:00
dc55dc2c73
remove unneeded code and files.
2002-03-08 13:22:11 +00:00
babf2e5892
cpu_swapout() moved to cpu.h
2002-03-08 13:12:10 +00:00
069a559c65
Remove some files that no longer exist.
2002-03-07 19:34:37 +00:00
3c8b0446fe
Change type of dumpmag to u_int32_t since it is actually
...
a 32bit unsigned magic number.
As per discussion on tech-kern, and fixes port-sparc64/11949.
2002-03-06 13:10:18 +00:00
2f603eaa17
CTL_MACHDEP definitions are integrated into sh3/include/cpu.h again.
2002-03-04 14:36:13 +00:00
6f0fb25121
Don't need to declare phys_map - it is declared in <uvm/uvm_extern.h>.
2002-03-04 02:43:22 +00:00
08aefbe07d
remove temporal debug code.
2002-03-03 14:32:21 +00:00
90baa8b206
SR related parts moved to psl.h. cpufunc.h segments.h are removed.
...
kernel mode checking is only SR.MD. no check stack pointer.
2002-03-03 14:31:24 +00:00
17fbf85dc3
machine dependent sysctl are moved to machine/cpu.h
...
dreamcast, hpcsh ... CPU_CONSDEV
mmeye, evbsh3 ... CPU_CONSDEV, CPU_LOADANDRESET
2002-03-03 14:28:48 +00:00
6042c0a3fc
Initial support for KGDB on the sh3.
2002-03-02 22:26:25 +00:00
65af267aeb
Add SH7709A INTEVT2 register define.
2002-03-02 22:25:19 +00:00
b94c8137ab
cpu_reset:
...
Set EXPEVT to 0x20(manual reset) before jump to reset vector.
2002-02-28 18:18:51 +00:00
9c21656766
cpu_dumpconf, reserve_dumppages, dumpsys, cpu_reset are moved to sh3/sh3_machdep.c
2002-02-28 16:54:28 +00:00
4324f37586
Use "#define<tab>".
2002-02-28 03:17:23 +00:00
6ece4e10f0
Remove #if 0 #endif
2002-02-28 01:58:53 +00:00
bbc655c4fb
Cleanup register definition
2002-02-28 01:56:57 +00:00
40382c6556
Change foo_r0_r1 macro in sh3/locore.h to foo(Rn, Rm)
2002-02-28 01:53:42 +00:00
06fbd079f5
Remove unneeded header.
2002-02-28 01:52:28 +00:00
e8116a8f5b
- Use DEV_ constants, instead of documenting the numbers!
...
- Delete cdev_decl(mm); where appropriate, and other hand-crufting [hi powerpc!]
2002-02-27 01:20:51 +00:00
d9ab16ba2f
Purge CLSIZE, CLSIZELOG2 and MCLOFSET.
...
Be consistant in the way that MSIZE, MCLSHIFT, MCLBYTES and NMBCLUSTERS
are defined.
Remove old VM constants from cesfic port.
Bump MSIZE to 256 on mipsco (the only one that wasn't already 256).
2002-02-26 15:13:19 +00:00
31ae0ac1e9
clean up Makefiles
2002-02-24 20:10:53 +00:00
6bda0e36c3
use sh_clock_get_pclock() instead of PCLOCK.
2002-02-24 19:35:42 +00:00
3c3da7bf57
_start -> start.
2002-02-24 18:24:15 +00:00
693be1956c
Move common exception vector and scheduler code to
...
sh3/sh3/exception_vector.S and sh3/sh3/locore_subr.S. exception
vectors are installed by sh_cpu_init(). machine/locore.S contains
kernel entry, interrupt handler, and some MD code.
2002-02-24 18:19:40 +00:00
72589177e0
remove obsolete file.
2002-02-24 18:13:06 +00:00
b1b1f1117b
NetBSD/sh3 common part of clock routine.
2002-02-22 19:55:33 +00:00
f3b1882035
print MMU infomation.
2002-02-22 19:46:34 +00:00
f694c9fdd7
New NetBSD/sh3 clock framework.
...
+ hardclock source is moved from TMU1 to TMU0.
+ SH3/SH4 common kernel support.
+ PCLOCK estimation.
+ remove duplicated code.
2002-02-22 19:43:58 +00:00
5f5cce9adc
Clean up function declaration.
2002-02-19 17:22:34 +00:00
1bdc7cc5ca
Clean up functions
...
disable_intr, enable_intr, disable_interrupt, enable_interrupt,
disable_ext_intr, enable_ext_intr.
New functions:
for external interrupt:
_cpu_intr_suspend and _cpu_intr_resume.
for exception:
_cpu_exception_suspend and _cpu_exception_resume.
2002-02-19 17:21:18 +00:00
37e458fa45
strategy should have an 'r'. Inspired by similar change in OpenBSD.
2002-02-19 17:09:40 +00:00
2d8577fb83
Clean up some rampant code duplication wrt ieee number handling:
...
- Add alignment-safe double and float unions.
- Use the above for the __infinity and __nan constants on all
architectures that use the standard ieee754 representation of
those constants.
- Add a single copy of various ieee754 math functions (frexp, isinf,
isnan, ldexp and modf) that had numerous duplicates among the
arch-specific directories.
- Use the above functions on all architectures where the generic C
versions where used. Architectures that had local assembly
routines are untouched (for those functions only).
2002-02-19 13:08:12 +00:00
6e0794b560
To determine CPU architecture and product, add cpu_arch and cpu_prduct variables.
...
these are initialized by sh_cpu_init()@sh3/sh3_machdep.c
(see sh3/include/cputypes.h for detail.)
add "options SH3" for SH3 kernel config file.
2002-02-17 20:59:33 +00:00
14bcf8c92a
add cache dump
2002-02-17 20:58:35 +00:00
a96c1d0e8f
change register naming.
2002-02-17 20:58:02 +00:00
70826aa2cd
sh_cpu_init() is added. its initialize cache, MMU ops appropriately.
...
machine locore code call this at first.
2002-02-17 20:57:09 +00:00
780de330ba
Add new MMU API. for detail, see sh3/mmu.h's comment.
2002-02-17 20:55:50 +00:00
779bf563f4
ANSIfy. remove #if 0 ... #endif.
2002-02-17 20:53:40 +00:00
b744097a5f
allow writing to write-only mappings. fixes PR 3493.
2002-02-14 07:08:02 +00:00
b3f7b11fe7
ANSIfy KNF.
2002-02-12 15:26:45 +00:00
7f6769e315
wrap #ifdef SH4
2002-02-11 18:55:16 +00:00
9487e1d731
change PTE PG_* bit define to support SH4 PCMCIA space attribute fully.
...
for detail, see pte.h.
2002-02-11 18:06:06 +00:00
32f2c6e61f
clean up redundant PTE PG_* defines.
...
PG_RO -> PG_KR
PG_RW -> PG_KW
PG_u -> PG_URKR
PG_PROT -> PG_UW
PG_AVAIL1 -> PG_PVLIST
2002-02-11 18:05:17 +00:00
6a86080d84
add useful macro for running P2, P1 area.
2002-02-11 18:04:24 +00:00
uch