- make DMA descriptors volatile to avoid possible unintended reordering
which might cause some race conditions
- process interrupts until all NFE_IRQ_WANTED bits are handled
and also put misc fixes:
- return 1 and call nfe_start() in nfe_intr() only if any own interrupts
are actually handled
- use bus_dmamap_load_mbuf(9) for RX mbufs rather than bus_dmamap_load(9)
with mtod(9) and MCLBYTES
- check sc->txq.queued to see if TX descriptors are queued or handled
in nfe_start() and nfe_txeof()
- use proper BUS_DMASYNC_{PRE,POST} ops
- prepare and use NFE_[RT]X_NEXTDESC() macro
- rename NFE_TX_TCP_CSUM to NFE_TX_TCP_UDP_CSUM since it also enables
hardware udp4csum-tx for UDP4 packets
- some minor optimization
- misc KNF
Tested and confirmed by matthew green by
"to send >25MB/sec to nfe0 for over one hour,"
and also tested by me (with light TRX load on 100baseTX though)
for a month.
with newlock2 merge:
Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.
int _bus_dmatag_subregion(bus_dma_tag_t tag,
bus_addr_t min_addr,
bus_addr_t max_addr,
bus_dma_tag_t *newtag,
int flags)
void _bus_dmatag_destroy(bus_dma_tag_t tag)
that allow a (normally broken/limited) device to restrict the bus address
range it can talk to. this is used by bce(4) to limit DMA addresses to
1GB range, the maximum the chip can address.
all this is from Yorick Hardy <yhardy@uj.ac.za> with input from several
people on tech-kern.
XXX: bus_dma(9) needs an update still.
the wrong place in the buffer. Fix an issue in the !sc->bge_rx_alignment_bug
case reported by Nicolas Joly.
While there remove a duplicate m_adj(), and add a missing bus_dmamap_unload().
parentheses in return statements.
Cosmetic: don't open-code TAILQ_FOREACH().
Cosmetic: change types of variables to avoid oodles of casts: in
in6_src.c, avoid casts by changing several route_in6 pointers
to struct route pointers. Remove unnecessary casts to caddr_t
elsewhere.
Pave the way for eliminating address family-specific route caches:
soon, struct route will not embed a sockaddr, but it will hold
a reference to an external sockaddr, instead. We will set the
destination sockaddr using rtcache_setdst(). (I created a stub
for it, but it isn't used anywhere, yet.) rtcache_free() will
free the sockaddr. I have extracted from rtcache_free() a helper
subroutine, rtcache_clear(). rtcache_clear() will "forget" a
cached route, but it will not forget the destination by releasing
the sockaddr. I use rtcache_clear() instead of rtcache_free()
in rtcache_update(), because rtcache_update() is not supposed
to forget the destination.
Constify:
1 Introduce const accessor for route->ro_dst, rtcache_getdst().
2 Constify the 'dst' argument to ifnet->if_output(). This
led me to constify a lot of code called by output routines.
3 Constify the sockaddr argument to protosw->pr_ctlinput. This
led me to constify a lot of code called by ctlinput routines.
4 Introduce const macros for converting from a generic sockaddr
to family-specific sockaddrs, e.g., sockaddr_in: satocsin6,
satocsin, et cetera.
- remove the code to bring down the PHY in bnx_stop(), it's wrong
(ifm_data isn't updated) and lead to a panic in mii_phy_setmedia(),
or reading past the end mii_media_table[].
- make sure the dma_map matches the mbuf in the rx structures. We would
sync/unload the wrong map, leading to a DIAGNOSTIC panic, or eventually
leaking memory when bounce buffers are needed.
needs to be rewritten to use the scsipi layer. Additionally:
- Missing copyright years: 2000, 2001, 2002, 2003
- Missing attribution: Andrew Doran and Jason R. Thorpe
If we're handling system management interrupts ourselves, the system locks
solid when the ACPI timer SCI fires. Disable this interrupt so we can have
an uptime of more than ~10 minutes.
The "pci0 dev 1 function 2" aka "System Management" on the nForce chipset
isn't detected on the Xbox. If XBOX is defined and arch_i386_is_xbox is
true, force intrline to 12 and map the system management IO space at
0x8000. We can now call iic_smbus_intr when a system management interrupt
takes place.
While we're here, make amdpm_smbus honour the I2C_F_POLL flag.
The Xbox no longer resets when you press the eject button.
Most Cardbus bridges supported by pccbb(4) fire a power-cycle
interrupt when the power state of a cardslot changes from 'off' to
'on'. TI bridges fire a power-cycle interrupt on both on->off and
off->on changes.
When pccbb_power() powered-down a cardslot, it did not wait around
for the power-cycle interrupt. When pccbb_power() powered-up a
cardslot, it did wait for the interrupt. If a pccbb_power(UP)
followed a pccbb_power(DOWN) very closely, pccbb_power() used to
interpret the power-cycle interrupt for the up->down transition as
"power-up complete," read the power-state bit and, finding that
power had NOT been activated, complain, "cbb0: power on failed?"
Then pccbb_power() exited before power-activation was complete,
falsely indicating that the power-activation *was* complete. After
that, a driver attach/enable routine would blithely configure a
card that was not fully powered-up. An operator who ran a command
such as 'ifconfig rtw0 down up' or 'ifconfig ath0 down up' would
read 'cbb0: power on failed?' in the system log, and their NIC
would misbehave.
This excerpt from a comment in the source should suffice to explain
how I fixed the bug,
/*
* Wait as long as 200ms for a power-cycle interrupt. If
* interrupts are enabled, but the socket has already
* changed to the desired status, keep waiting for the
* interrupt. "Consuming" the interrupt in this way keeps
* the interrupt from prematurely waking some subsequent
* pccbb_power call.
And this explains why this patch will work for Ricoh bridges that
do not fire an interrupt on the on->off transition:
* XXX Not every bridge interrupts on the ->OFF transition.
* XXX That's ok, we will time-out after 200ms.
*
* XXX The power cycle event will never happen when attaching
* XXX a 16-bit card. That's ok, we will time-out after
* XXX 200ms.
*/
M. Warner Losh and Charles M. Hannum provided valuable input on
this patch.
sketch