capability, using D3 and D0 power states. This saves me quite a bit
of battery when not using the built-in Ethernet on my IBM T-20 during
long IETF meetings.
- More SCSI port defs.
- Nuke vtophys().
- Release resources in iop_init() upon failure.
- Don't use a message wrapper when initalising the outbound FIFO.
- A couple of field size/endian fixes.
- Just use iop_post() when we don't need special handling.
- IM_DISCARD is now pointless, since we don't queue at the driver level.
- Map data transfers from/to userspace directly.
- A few comment and stylistic changes.
false informations on a loaded ethernet segement.
- convert to bus_dma(9) (better late than never :)
- add proper le32toh/htole32 so that it works on big-endian system (tested
on macppc).
Close PR kern/10327.
using level triggered interrupts, which livelocks calling intr routine
if the data register is not read in the interrupt routine, as it's case
when polling after interrupts are enabled during boot.
Block all interrupts when polling for keypress, and modify intr routine
to read and store value from data register. The latter one is to avoid
losing a keypress when one would manage to press a key when kernel is
not in spl-guarded code section.
Tested with classic pccons, 'pcconskbd at pckbc' and 'pckbd at pckbc'
configurations, on i386.
My WDC MDMA-only (non-UDMA) drives did not work on the Acard controllers,
but it turns out that the problem was not Acard specific.
These WDC drives do not work on the ESS ISAPnP wdc port nor on
macppc obio wdc port neither, and another Quantum MDMA-only drive
works fine on the Acard.
These WDC drives work fine on my i386 pciide (which is initialized
by the BIOS), so maybe we have to do something in MI wdc to initialize
such drives properly...
augustss