processors. Instead, allocate separate idle PCBs for them (including
the primary -- don't use proc0's for its idle context).
- Use SysValue to store the cpu_info for each processor.
- alpha_rpcc(), alpha_mb(), alpha_wmb() -- these are instructions, and
we win by inlining them: rpcc is generally used for profiling, and
the memory barriers really should execute as quickly as possible with
minimal side-effects (like additional loads/stores required to call the
functions!)
- alpha_pal_imb(), alpha_pal_rdps(), alpha_pal_swpipl(), alpha_pal_tbi(),
alpha_pal_whami() -- these are PALcode ops. We must specify some register
clobbers for these.
We have a very decent size savings as a result. My test system:
text data bss dec hex filename
2671724 235848 377016 3284588 321e6c /netbsd.bak
2617708 235736 377016 3230460 314afc /netbsd
Most of this comes from fewer register saves/restores around spl*() calls
(now that alpha_pal_rdps() and alpha_pal_swpipl() are inlined).
Note that alpha_pal_rdps() and alpha_pal_swpipl() remain in pal.s to
maintain binary compatibility with LKMs that may use spl*() functions.
add an IPI which causes the target CPU to perform AST processing when
it returns to userspace.
- Add a way to get/set a private pointer in the shared interrupt header.
longer need to lock the kernel pmap in pmap_kenter_pa() and pmap_kremove().
- Since locking the kernel pmap in interrupt context is no longer required,
don't go to splimp() when locking the kernel pmap.
- Implement a new pmap_remove() function, not yet enabled by default. It
is structured like pmap_protect, and should be *much* faster. This was
actually written quite some time ago, but never committed because it
didn't work properly. Given the recent bugfix to pmap_protect(), "duh,
of course it didn't work properly before...". It seems to work fine now
(have done several builds and run the UVM regression tests using the new
code), but it is currently run-time optional so that some performance
measurements can be easily run against the old and new code.
big-endian. i386, pc532 and vax still include <machine/byte_swap.h>
and define macros for the {n,h}to{h,n}*() functions. mips also
defines some endian-independent assembly-code aliases for unaligned
memory accesses.
that is priority is rasied. Add a new spllowersoftclock() to provide the
atomic drop-to-softclock semantics that the old splsoftclock() provided,
and update calls accordingly.
This fixes a problem with using the "rnd" pseudo-device from within
interrupt context to extract random data (e.g. from within the softnet
interrupt) where doing so would incorrectly unblock interrupts (causing
all sorts of lossage).
XXX 4 platforms do not have priority-raising capability: newsmips, sparc,
XXX sparc64, and VAX. This platforms still have this bug until their
XXX spl*() functions are fixed.
context, so we must block interrupts which may cause memory allocation
before asserting the kernel pmap's lock. Put this all in PMAP_LOCK()
and PMAP_UNLOCK() macros to make it easier.
* Implement fpgetsticky() for alpha.
* Direct fpsetsticky() and fp{get,set}mask() into alpha kernel via sysarch(2).
* Define new sysarch(2) stub for above and install and distribute sysarch.h
for alpha. (The fpcr IS user mode r/w, but for reasons beyond the scope
of a commit message kernel calls are needed.) And much kernel Magick is
required before these do anything, but this way programs compiled under
1.4 will DTRT on future snapshots and releases.
kleink