- the value of the ATA error register would be computed wrongly, leading to
bogus error values reported to wd(4)
- the channel would not always be restarted after an error, so the next
command would not be handled by the controller
- a timeout condition would not be properly reported to wd(4), leading
to a short transfer instead of a reset/retry
these bugs would cause a AHCI SATA channel to be stalled (no more command
processed) after a "ID not found" or "Aborted command" error reported by the
drive.
+ It is easy to understand that memsize is added to physcal_freeend.
+ Add VERBOSE_INIT_ARM at befor/after with printf().
+ Call ddb_init() before db_machine_init().
+ Fix declered kgdb_devrate.
+ Add INCLUDE_CONFIG_FILE and UFS_DIRHASH.
+ Add white space at file-system and enabled some file-system.
+ Comment-outed un-major devices.
+ Add stuirda, uchcom, ugensa.
Somehow having it above interfered with ctags(1) producing a tag
for etherip_softc.
Remove the sole member of the union etherip_softc.sc_scr; call it
sc_ro. Delete the union. Delete the #define for sc_ro. The union
was a holdover from days before the route caches were unified.
when arrays have a large number of stripes. Remove unused variable
(recon_stripes_done). Thanks to Dieter Roelants for the report,
suggestions, and testing. Addresses PR#36878.
as its cache/tlb management smarts relied too heavily on pre-merge context-
switch behaviour. See PR kern/36548 for one manifestation of the breakage.
To address this:
- Ditch the shadow pmap variables in the PCB (pagedir, l1vec, dacr, cstate)
as it was too easy for them to get out of sync with the pmap.
- Re-write (and fix) the convoluted cpuswitch.S cache/tlb ASM code in C.
It's only slightly less efficient, but is much more readable/maintainable.
- Document cpufuncs.cf_context_switch() as being C-callable.
- pmap_activate() becomes a no-op if the lwp's vmspace is already active.
(Good performance win, since pmap_activate() is now invoked on every
context-switch, even though ARM's cpu_switchto() already does all the
grunt work)
XXX: Some CPU-specific armXX_context_switch() implementations (arm67,
arm7tdmi, arm8) always flush the I+D caches. This should not be necessary.
Someone with access to hardware (acorn32?) needs to deal with this.
the following do not wake other threads early:
pthread_mutex_lock(&mutex);
pthread_cond_broadcast(&cond);
foo = malloc(100); /* takes libc mutexes */
pthread_mutex_unlock(&mutex);
Copy the entire sockaddr to the buffer to be written to user space,
according to its length, not just the part that fits in struct
sockaddr.
This fixes the 'bad MAC address' problem in dhclient.
next ifreq is sizeof(struct ifreq) after the current one unless the
sockaddr is bigger than the union in ifreq that holds it.
In the original 4.4BSD code, this interpretation results in the same
behavior as the "is the sockaddr bigger than struct sockaddr", because
sizeof(struct sockaddr) and sizeof(ifc->ifr_ifru) are the same.
Add comments pointing out problems in the 'need bigger buffer' code,
and copying excessive amounts of data.
