pci_attach_args *" instead of from four separate parameters which in
all cases were extracted from the same "struct pci_attach_args".
This both simplifies the driver api, and allows for alternate PCI
interrupt mapping schemes, such as one using the tables described in
the Intel Multiprocessor Spec which describe interrupt wirings for
devices behind pci-pci bridges based on the device's location rather
the bridge's location.
Tested on alpha and i386; welcome to 1.5Q
setting for the "Idle/Pipeline DRAM Leadoff Timing (IPLDT)" parameter
(bits 9:8) is 01. Unfortunately, some BIOSs do not set these bits properly.
Based on a hint from OpenBSD.
Under this option, if only one IRQ is available for the link,
we assumes that the IRQ is already connected, and configure
PCI Interrupt Configuration Register accordingly.
This is what Linux pcmcia-cs-3.1.19 does by default.
This fixes unconfigured pccbb interrupt problem of
Sharp Mebius MN-5500. It's interrupt router is ITExpress Inc. IT8330G.
(http://www.ite.com.tw/, vendor=0x1283, product=0x8330)
Problem reporeted by Kitagawa <sk@kiu.ac.jp> in
http://www.kaynet.or.jp/~kay/ml/netbsd-pcmcia/msg/msg00608.html
Avoid interpreting the upper 32 bits of 64-bit BARs as a 32-bit BAR.
Otherwise, the code would assume that the value 0 was incorrect and either:
(a) [on bus 0] "fix up" the address to some nonzero value, thus placing
the decoded address range outside of 32-bit address space, or
(b) [elsewhere] completely disable the device.
The fact that this behaviour depends on the bus number of the device is
already XXX'd.
XXX: This will need revisiting if and when we ever want to handle a PCI bus
XXX: with more than 32 bits of address space on an i386.
The onboard Adaptec 7890 on my Dell Precision Workstation 410 works again.
- Use PCI_INTERRUPT_PIN_MAX and I386_PCI_INTERRUPT_LINE_NO_CONNECTION
instead of magic number.
the Following changes are
{Modified with,Approved by} UCHIYAMA Yasushi <uch@netbsd.org>:
- Do not touch a PIRQ router, if the PIRQ is already routed
by the BIOS, or no appropriate IRQ is found for the PIRQ.
The latter prevents a panic on the machine of Frank van der Linden.
- Do not modify a PCI Interrupt Configuration register,
if it is already set by the BIOS, even if it is inconsistent
with the PCI IRQ routing table provided by the BIOS.
(The PCI Interrupt Configuration register seems to be more reliable
than the PCI IRQ routing table.)
This is needed to prevent a incorrect header_fixup() caused
by the incorrect PIR table on a Panasonic Let's Note AL-N2T516J5.
Provide "options PCIBIOS_INTR_FIXUP_FORCE" to retain
previous behavior, i.e. believe the PCI IRQ routing table
and ignore the PCI Interrupt Configuration register.
Although I'm not sure this is really needed.
- Do not modify a PCI Interrupt Configuration register,
if appropriate IRQ is not found for the link.
- Move a pciintr_icu_getclink() call and a pciintr_icu_get_intr()
call from pciintr_link_fixup() to pciintr_link_alloc(),
and only allocate pciintr_link_map if those calls succeeded.
This reduces number of calls of pciintr_icu_getclink(),
and also avoid necessity to validate a clink value in
ICU's {get,set}_{intr,trigger}() functions.
The sanity checks are not removed yet, though.
- Fix uninitialized usage of variable `bitmap' on stage 3
of pciintr_link_fixup().
- Remove a member variable `old_irq' from struct pciintr_link_map.
- Always use 0x%02x for printf format of canonical link value.
- Use DIAGNOSTIC instead of PCIINTR_DEBUG for really weird situation.
to prevent a panic on a Panasonic Let's Note AL-N2T516J5.
- add several debug printf which can be enabled by FIRESTARDEBUG.
by UCHIYAMA Yasushi <uch@netbsd.org>
- use I386_PCI_INTERRUPT_LINE_NO_CONNECTION instead of magic number.
<vm/pglist.h> -> <uvm/uvm_pglist.h>
<vm/vm_inherit.h> -> <uvm/uvm_inherit.h>
<vm/vm_kern.h> -> into <uvm/uvm_extern.h>
<vm/vm_object.h> -> nothing
<vm/vm_pager.h> -> into <uvm/uvm_pager.h>
also includes a bunch of <vm/vm_page.h> include removals (due to redudancy
with <vm/vm.h>), and a scattering of other similar headers.
Some PCI soundcards don't seem to use the generic gameport function with
interface 0x10 used here, but have either an own BAR dedicated to this
(i.e. Sonic Vibes or ESS Solo-1) or specify their own device (see
PCI_PRODUCT_CREATIVELABS_SBJOY in sys/dev/pci/pcidevs.h).
Probably these use a similar simple sheme and adding a frontend for them would
be trivial, but I don't own any of these cards, so I didn't.
entries for the IRQs used by the IDE controller, which aren't really
PCI IRQs (they're ISA compat IRQs), and thus have link values that
don't make a lot of sense.
patches, cleaned up and heavily reworked by me. Basic algorithm is
the same, although the code structure is now quite different.
Main differences:
- Initialization path is totally different.
- We use the `compat router' information, if present, to determine which
PCI ICU driver we should use.
- Fixup configuration headers on devices not on bus 0.
out from UCHIYAMA Yasushi's PCI BIOS patches, and fairly heavily reworked
by me.
Main differences:
- Only use the PCI BIOS to get the config mechanism and interrupt routing
info for now. No need to use the BIOS for PCI config access right now,
since the old mechanism works fine, and this keeps the code smaller.
- PCI BIOS initialization code path is much different.
- Always use the $PIR table if it exists, and only fallback to the
PCI BIOS 2.1 GetInterruptRouting call if it's not there.
This module does not include any of the fixup code; that is coming
in separate commits.
tsutsui