in this commit. SFP module removal interrupt detects but not used yet:
- Detect SFP's 1000BASE-SX, 1000BASE-LX, 100BASE-FX and 1000BASE-T correctly.
- Detect the Media Auto Sense feature. Not supported yet.
- Add comment.
82578 is +1 from 82577 but 82577 is functionally newer than 82578 (and 82577's
MII_MODEL(0x05) is greater than 82578's (0x04)). This change doesn't affect any
behavior to if_wm.c (NFCI).
Add comment.
kmrn_{read,write}reg() are not used for MII API, so it's not required for
these functions to use the same API. So,
- Change return value as error code.
- Change register vaule from int to uint16_t.
- read: pass pointer for uint16_t as an argument.
- Check return value on caller side.
- Check whether it's required to use MDIC workaround for 80003 or not in
wm_reset(). If the workaround isn't required, don't use the workaround code
in wm_gmii_i80003_{read,write}reg.
following:
- 8257[12]: Don't directly access SPI but use EERD register.
- 82575-I354: If the size of SPI ROM >= 32K words, use direct SPI access
instead of EERD register access.
- Add wm_nvm_eec_clock_raise() and wm_nvm_eec_clock_lower() and use them for
Microwire/SPI bus control. Same as Linux and FreeBSD.
- Redude timeout value for 80003 in wm_get_swfw_semaphore(). Same as
Linux and FreeBSD.
mii_{read|write}reg. This function is called twie.
To identify PHY type, correct read/write function should be selected. To
select correct read/write function, PCI ID or MAC type are required without
accessing PHY registers.
On the first call of this function, PHY ID is not known yet. Check PCI ID or
MAC type. The list of the PCI ID may not be perfect, so the result might be
incorrect.
In the second call, PHY OUI and model are used to identify PHY type. It might
not be perfpect because of the lack of compared entry, but it would be better
than the first call.
If the detected new result and previous assumption is different, diagnous
message will be printed.
- Use BME1000_PHY_PAGE_SELECT in wm_gmii_bm_{read,write}reg(). This change has
no effect because GG82563_PHY_PAGE_SELECT and BME1000_PHY_PAGE_SELECT have
the same value.
- PCH_LPT (and newer device) is required to check FWSM_WLOCK_MAC bit to
determine the range of the RAL.
- Fix typo in comment and modify comment by tnn@.
- Rename wm_check_reset_block() to wm_phy_resetisblocked() and make it returns
bool. No functional change.
- Add wm_gmii_gs40g_{read|write}reg() and use it to access non-standatrd
page.
- Add wm_pll_workaround_i210() and call it when
chip is i211
chip is i210 and it use INVM
chip is i210 and NVM image version < 3.25
- Add comment
- Rename macros.
- Add SERDES specific functions.
- Fix IO pin configuration.
- Reset autonego timer when link becomes up.
TODO:
- Fix a bug that SFP ROM can't read.
- Perhaps some work is required for 8257[12] serdes systems.
- Remove duplicated code in TBI's link related functions.
- The name of I217 is similar to I210, but the function is rather similar to
PCH2.
- Not tested well. Tested with my own Intel DQ87PG which has I217LM onboard.
- It seems that PCH2 and PCH_LPT specific function for RAL should be written.
- Quick hack for the NVM checksum mismatch. if_wm.c currently has no
wm_write_eeprom(), so it cannot update NVM's "updated bit". To avoid this
problem, check only the last 12bits of the checksum. My own DQ87PG's
updated bit is not set, and I could avoid the problem using with this
hack.
- wm_enable_wakeup() is disabled by default. If you want to use WOL with
the Magic Packet, define WM_WOL.
- Add the following flags:
WM_F_ASF_FIRMWARE_PRESENT
WM_F_ARC_SUBSYSTEM_VALID
WM_F_HAS_AMT
WM_F_HAS_MANAGE
WM_F_WOL
- Add wm_suspend() and wm_resume(). Give/get the control to/from the
firmware.
- Need more work for PCH. See wm_enable_phy_wakeup().
- Enable wm_get_hw_control() for 82574 and 82583.
- Add Yet another workaround for ICH8.
- Add wm_igp3_phy_powerdown_workaround_ich8lan() for power down problem
on D3.
- Apply the patch for 82575 from Wolfgang Stukenbrock (PR#42422). We use
only one RX ring and with the legacy mode.
- Add support for 82576.
- Partial support for 82580.
- Partial support for the serdes systems.
I don't know what driver i82578 should be attached to. makephy? or atphy?
MII_OUI() says that the PHY is from Attansic (== Atheros). Intel's e1000
driver says that it's close to makphy...
I can't link up at 1000BaseT yet...
chips don't set EECD_EE_PRES.
- Fix a bug that both WM_F_EEPROM_SPI and WM_F_EEPROM_FLASH are set.
- Add a missing decrement for a timeout reported by Wolfgang Stukenbrock
in PR#42422.
- Add support for i82583V.
- PBA setting for i82574 is not 12K but 20K.
- Enable checking the management mode on 82574.
- Add dspcode for igp3 and use it when the EEPROM isn't available.
- Add some delays.
- Stop the PHY transmitter before patching the DSP code and restart it after wrote.
- Save and restore register 0x2f5b.
- Patch for the DSP code is only for 8254[17] and we have to apply the
different patches between rev. 1 and rev. 2.
- The workaround for analog fuse is only for 82547 rev. 1.
- The workaround for smartspeed is only for 8254[17]
see http://mail-index.netbsd.org/tech-net/2009/08/05/msg001546.html
msaitoh