Re-enable igphy's 82566 support.
- Patch for the DSP code is only for 8254[17] and we have to apply the different patches between rev. 1 and rev. 2. - The workaround for analog fuse is only for 82547 rev. 1. - The workaround for smartspeed is only for 8254[17] see http://mail-index.netbsd.org/tech-net/2009/08/05/msg001546.html
This commit is contained in:
parent
410d5e309e
commit
f03b836566
@ -1,4 +1,4 @@
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/* $NetBSD: igphy.c,v 1.18 2009/08/06 04:58:48 kml Exp $ */
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/* $NetBSD: igphy.c,v 1.19 2009/12/16 04:50:35 msaitoh Exp $ */
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/*
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* The Intel copyright applies to the analog register setup, and the
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@ -70,7 +70,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: igphy.c,v 1.18 2009/08/06 04:58:48 kml Exp $");
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__KERNEL_RCSID(0, "$NetBSD: igphy.c,v 1.19 2009/12/16 04:50:35 msaitoh Exp $");
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#include "opt_mii.h"
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@ -87,12 +87,13 @@ __KERNEL_RCSID(0, "$NetBSD: igphy.c,v 1.18 2009/08/06 04:58:48 kml Exp $");
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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#include <dev/mii/miidevs.h>
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#include <dev/mii/igphyreg.h>
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#include <dev/pci/if_wmvar.h>
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struct igphy_softc {
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struct mii_softc sc_mii;
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int sc_smartspeed;
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uint32_t sc_mactype;
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};
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static void igphy_reset(struct mii_softc *);
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@ -116,6 +117,9 @@ static const struct mii_phydesc igphys[] = {
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{ MII_OUI_yyINTEL, MII_MODEL_yyINTEL_IGP01E1000,
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MII_STR_yyINTEL_IGP01E1000 },
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{ MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82566,
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MII_STR_yyINTEL_I82566 },
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{0, 0,
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NULL },
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};
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@ -138,11 +142,17 @@ igphyattach(device_t parent, device_t self, void *aux)
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struct mii_attach_args *ma = aux;
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struct mii_data *mii = ma->mii_data;
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const struct mii_phydesc *mpd;
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struct igphy_softc *igsc = (struct igphy_softc *) sc;
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prop_dictionary_t dict;
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mpd = mii_phy_match(ma, igphys);
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aprint_naive(": Media interface\n");
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aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
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dict = device_properties(parent);
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if (!prop_dictionary_get_uint32(dict, "mactype", &igsc->sc_mactype))
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aprint_error("WARNING! Failed to get mactype\n");
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sc->mii_dev = self;
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sc->mii_inst = mii->mii_instance;
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sc->mii_phy = ma->mii_phyno;
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@ -169,6 +179,7 @@ igphyattach(device_t parent, device_t self, void *aux)
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static void
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igphy_load_dspcode(struct mii_softc *sc)
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{
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struct igphy_softc *igsc = (struct igphy_softc *) sc;
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static const struct {
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int reg;
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uint16_t val;
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@ -186,6 +197,18 @@ igphy_load_dspcode(struct mii_softc *sc)
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};
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int i;
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/* This workaround is only for 82541 and 82547 */
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switch (igsc->sc_mactype) {
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case WM_T_82541:
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case WM_T_82547:
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case WM_T_82541_2:
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case WM_T_82547_2:
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break;
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default:
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/* byebye */
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return;
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}
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delay(10);
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PHY_WRITE(sc, MII_IGPHY_PAGE_SELECT, 0x0000);
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@ -193,8 +216,19 @@ igphy_load_dspcode(struct mii_softc *sc)
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delay(5);
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for (i = 0; dspcode[i].reg != 0; i++)
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IGPHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
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switch (igsc->sc_mactype) {
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case WM_T_82541:
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case WM_T_82547:
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for (i = 0; dspcode[i].reg != 0; i++)
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IGPHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
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break;
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case WM_T_82541_2:
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case WM_T_82547_2:
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IGPHY_WRITE(sc, 0x1f73, 0x0099);
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break;
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default:
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break;
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}
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PHY_WRITE(sc, MII_IGPHY_PAGE_SELECT,0x0000);
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PHY_WRITE(sc, 0x0000, 0x3300);
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@ -203,31 +237,34 @@ igphy_load_dspcode(struct mii_softc *sc)
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static void
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igphy_reset(struct mii_softc *sc)
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{
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struct igphy_softc *igsc = (struct igphy_softc *) sc;
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uint16_t fused, fine, coarse;
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mii_phy_reset(sc);
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igphy_load_dspcode(sc);
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fused = IGPHY_READ(sc, MII_IGPHY_ANALOG_SPARE_FUSE_STATUS);
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if ((fused & ANALOG_SPARE_FUSE_ENABLED) == 0) {
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fused = IGPHY_READ(sc, MII_IGPHY_ANALOG_FUSE_STATUS);
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if (igsc->sc_mactype == WM_T_82547) {
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fused = IGPHY_READ(sc, MII_IGPHY_ANALOG_SPARE_FUSE_STATUS);
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if ((fused & ANALOG_SPARE_FUSE_ENABLED) == 0) {
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fused = IGPHY_READ(sc, MII_IGPHY_ANALOG_FUSE_STATUS);
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fine = fused & ANALOG_FUSE_FINE_MASK;
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coarse = fused & ANALOG_FUSE_COARSE_MASK;
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fine = fused & ANALOG_FUSE_FINE_MASK;
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coarse = fused & ANALOG_FUSE_COARSE_MASK;
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if (coarse > ANALOG_FUSE_COARSE_THRESH) {
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coarse -= ANALOG_FUSE_COARSE_10;
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fine -= ANALOG_FUSE_FINE_1;
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} else if (coarse == ANALOG_FUSE_COARSE_THRESH)
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fine -= ANALOG_FUSE_FINE_10;
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if (coarse > ANALOG_FUSE_COARSE_THRESH) {
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coarse -= ANALOG_FUSE_COARSE_10;
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fine -= ANALOG_FUSE_FINE_1;
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} else if (coarse == ANALOG_FUSE_COARSE_THRESH)
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fine -= ANALOG_FUSE_FINE_10;
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fused = (fused & ANALOG_FUSE_POLY_MASK) |
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(fine & ANALOG_FUSE_FINE_MASK) |
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(coarse & ANALOG_FUSE_COARSE_MASK);
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fused = (fused & ANALOG_FUSE_POLY_MASK) |
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(fine & ANALOG_FUSE_FINE_MASK) |
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(coarse & ANALOG_FUSE_COARSE_MASK);
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IGPHY_WRITE(sc, MII_IGPHY_ANALOG_FUSE_CONTROL, fused);
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IGPHY_WRITE(sc, MII_IGPHY_ANALOG_FUSE_BYPASS,
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ANALOG_FUSE_ENABLE_SW_CONTROL);
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IGPHY_WRITE(sc, MII_IGPHY_ANALOG_FUSE_CONTROL, fused);
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IGPHY_WRITE(sc, MII_IGPHY_ANALOG_FUSE_BYPASS,
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ANALOG_FUSE_ENABLE_SW_CONTROL);
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}
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}
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PHY_WRITE(sc, MII_IGPHY_PAGE_SELECT,0x0000);
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}
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@ -376,6 +413,19 @@ igphy_smartspeed_workaround(struct mii_softc *sc)
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struct igphy_softc *igsc = (struct igphy_softc *) sc;
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uint16_t reg, gtsr, gtcr;
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/* This workaround is only for 82541 and 82547 */
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switch (igsc->sc_mactype) {
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case WM_T_82541:
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case WM_T_82541_2:
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case WM_T_82547:
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case WM_T_82547_2:
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break;
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default:
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/* byebye */
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return;
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}
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if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0)
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return;
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@ -1,4 +1,4 @@
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/* $NetBSD: if_wm.c,v 1.181 2009/11/26 15:17:10 njoly Exp $ */
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/* $NetBSD: if_wm.c,v 1.182 2009/12/16 04:50:35 msaitoh Exp $ */
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/*
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* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
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@ -76,7 +76,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.181 2009/11/26 15:17:10 njoly Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.182 2009/12/16 04:50:35 msaitoh Exp $");
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#include "bpfilter.h"
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#include "rnd.h"
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@ -129,6 +129,7 @@ __KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.181 2009/11/26 15:17:10 njoly Exp $");
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#include <dev/pci/pcidevs.h>
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#include <dev/pci/if_wmreg.h>
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#include <dev/pci/if_wmvar.h>
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#ifdef WM_DEBUG
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#define WM_DEBUG_LINK 0x01
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@ -229,31 +230,6 @@ struct wm_rxsoft {
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bus_dmamap_t rxs_dmamap; /* our DMA map */
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};
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typedef enum {
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WM_T_unknown = 0,
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WM_T_82542_2_0, /* i82542 2.0 (really old) */
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WM_T_82542_2_1, /* i82542 2.1+ (old) */
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WM_T_82543, /* i82543 */
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WM_T_82544, /* i82544 */
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WM_T_82540, /* i82540 */
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WM_T_82545, /* i82545 */
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WM_T_82545_3, /* i82545 3.0+ */
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WM_T_82546, /* i82546 */
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WM_T_82546_3, /* i82546 3.0+ */
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WM_T_82541, /* i82541 */
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WM_T_82541_2, /* i82541 2.0+ */
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WM_T_82547, /* i82547 */
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WM_T_82547_2, /* i82547 2.0+ */
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WM_T_82571, /* i82571 */
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WM_T_82572, /* i82572 */
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WM_T_82573, /* i82573 */
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WM_T_82574, /* i82574 */
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WM_T_80003, /* i80003 */
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WM_T_ICH8, /* ICH8 LAN */
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WM_T_ICH9, /* ICH9 LAN */
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WM_T_ICH10, /* ICH10 LAN */
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} wm_chip_type;
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#define WM_LINKUP_TIMEOUT 50
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/*
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@ -953,6 +929,7 @@ wm_attach(device_t parent, device_t self, void *aux)
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{
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struct wm_softc *sc = device_private(self);
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struct pci_attach_args *pa = aux;
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prop_dictionary_t dict;
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struct ifnet *ifp = &sc->sc_ethercom.ec_if;
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pci_chipset_tag_t pc = pa->pa_pc;
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pci_intr_handle_t ih;
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@ -1004,6 +981,10 @@ wm_attach(device_t parent, device_t self, void *aux)
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sc->sc_type = WM_T_82542_2_0;
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}
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/* Set device properties */
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dict = device_properties(sc->sc_dev);
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prop_dictionary_set_uint32(dict, "mactype", sc->sc_type);
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/*
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* Map the device. All devices support memory-mapped acccess,
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* and it is really required for normal operation.
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@ -1402,7 +1383,7 @@ wm_attach(device_t parent, device_t self, void *aux)
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* Read the Ethernet address from the EEPROM, if not first found
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* in device properties.
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*/
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ea = prop_dictionary_get(device_properties(sc->sc_dev), "mac-addr");
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ea = prop_dictionary_get(dict, "mac-addr");
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if (ea != NULL) {
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KASSERT(prop_object_type(ea) == PROP_TYPE_DATA);
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KASSERT(prop_data_size(ea) == ETHER_ADDR_LEN);
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@ -1439,8 +1420,7 @@ wm_attach(device_t parent, device_t self, void *aux)
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* Read the config info from the EEPROM, and set up various
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* bits in the control registers based on their contents.
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*/
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pn = prop_dictionary_get(device_properties(sc->sc_dev),
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"i82543-cfg1");
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pn = prop_dictionary_get(dict, "i82543-cfg1");
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if (pn != NULL) {
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KASSERT(prop_object_type(pn) == PROP_TYPE_NUMBER);
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cfg1 = (uint16_t) prop_number_integer_value(pn);
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@ -1451,8 +1431,7 @@ wm_attach(device_t parent, device_t self, void *aux)
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}
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}
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pn = prop_dictionary_get(device_properties(sc->sc_dev),
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"i82543-cfg2");
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pn = prop_dictionary_get(dict, "i82543-cfg2");
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if (pn != NULL) {
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KASSERT(prop_object_type(pn) == PROP_TYPE_NUMBER);
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cfg2 = (uint16_t) prop_number_integer_value(pn);
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@ -1464,8 +1443,7 @@ wm_attach(device_t parent, device_t self, void *aux)
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}
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if (sc->sc_type >= WM_T_82544) {
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pn = prop_dictionary_get(device_properties(sc->sc_dev),
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"i82543-swdpin");
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pn = prop_dictionary_get(dict, "i82543-swdpin");
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if (pn != NULL) {
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KASSERT(prop_object_type(pn) == PROP_TYPE_NUMBER);
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swdpin = (uint16_t) prop_number_integer_value(pn);
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99
sys/dev/pci/if_wmvar.h
Normal file
99
sys/dev/pci/if_wmvar.h
Normal file
@ -0,0 +1,99 @@
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/* $NetBSD: if_wmvar.h,v 1.3 2009/12/16 04:50:36 msaitoh Exp $ */
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/*
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* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*******************************************************************************
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Copyright (c) 2001-2005, Intel Corporation
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
|
||||
|
||||
1. Redistributions of source code must retain the above copyright notice,
|
||||
this list of conditions and the following disclaimer.
|
||||
|
||||
2. Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
|
||||
3. Neither the name of the Intel Corporation nor the names of its
|
||||
contributors may be used to endorse or promote products derived from
|
||||
this software without specific prior written permission.
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||||
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||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************/
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#ifndef _DEV_PCI_IF_WMVAR_H_
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#define _DEV_PCI_IF_WMVAR_H_
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typedef enum {
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WM_T_unknown = 0,
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WM_T_82542_2_0, /* i82542 2.0 (really old) */
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WM_T_82542_2_1, /* i82542 2.1+ (old) */
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WM_T_82543, /* i82543 */
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WM_T_82544, /* i82544 */
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WM_T_82540, /* i82540 */
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WM_T_82545, /* i82545 */
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WM_T_82545_3, /* i82545 3.0+ */
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WM_T_82546, /* i82546 */
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WM_T_82546_3, /* i82546 3.0+ */
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WM_T_82541, /* i82541 */
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WM_T_82541_2, /* i82541 2.0+ */
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WM_T_82547, /* i82547 */
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WM_T_82547_2, /* i82547 2.0+ */
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WM_T_82571, /* i82571 */
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WM_T_82572, /* i82572 */
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WM_T_82573, /* i82573 */
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WM_T_82574, /* i82574 */
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WM_T_80003, /* i80003 */
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WM_T_ICH8, /* ICH8 LAN */
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WM_T_ICH9, /* ICH9 LAN */
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WM_T_ICH10, /* ICH10 LAN */
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} wm_chip_type;
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#endif /* _DEV_PCI_IF_WMVAR_H_ */
|
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