Re-enable igphy's 82566 support.

- Patch for the DSP code is only for 8254[17] and we have to apply the
   different patches between rev. 1 and rev. 2.
 - The workaround for analog fuse is only for 82547 rev. 1.
 - The workaround for smartspeed is only for 8254[17]

see http://mail-index.netbsd.org/tech-net/2009/08/05/msg001546.html
This commit is contained in:
msaitoh 2009-12-16 04:50:35 +00:00
parent 410d5e309e
commit f03b836566
3 changed files with 182 additions and 55 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: igphy.c,v 1.18 2009/08/06 04:58:48 kml Exp $ */
/* $NetBSD: igphy.c,v 1.19 2009/12/16 04:50:35 msaitoh Exp $ */
/*
* The Intel copyright applies to the analog register setup, and the
@ -70,7 +70,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: igphy.c,v 1.18 2009/08/06 04:58:48 kml Exp $");
__KERNEL_RCSID(0, "$NetBSD: igphy.c,v 1.19 2009/12/16 04:50:35 msaitoh Exp $");
#include "opt_mii.h"
@ -87,12 +87,13 @@ __KERNEL_RCSID(0, "$NetBSD: igphy.c,v 1.18 2009/08/06 04:58:48 kml Exp $");
#include <dev/mii/mii.h>
#include <dev/mii/miivar.h>
#include <dev/mii/miidevs.h>
#include <dev/mii/igphyreg.h>
#include <dev/pci/if_wmvar.h>
struct igphy_softc {
struct mii_softc sc_mii;
int sc_smartspeed;
uint32_t sc_mactype;
};
static void igphy_reset(struct mii_softc *);
@ -116,6 +117,9 @@ static const struct mii_phydesc igphys[] = {
{ MII_OUI_yyINTEL, MII_MODEL_yyINTEL_IGP01E1000,
MII_STR_yyINTEL_IGP01E1000 },
{ MII_OUI_yyINTEL, MII_MODEL_yyINTEL_I82566,
MII_STR_yyINTEL_I82566 },
{0, 0,
NULL },
};
@ -138,11 +142,17 @@ igphyattach(device_t parent, device_t self, void *aux)
struct mii_attach_args *ma = aux;
struct mii_data *mii = ma->mii_data;
const struct mii_phydesc *mpd;
struct igphy_softc *igsc = (struct igphy_softc *) sc;
prop_dictionary_t dict;
mpd = mii_phy_match(ma, igphys);
aprint_naive(": Media interface\n");
aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
dict = device_properties(parent);
if (!prop_dictionary_get_uint32(dict, "mactype", &igsc->sc_mactype))
aprint_error("WARNING! Failed to get mactype\n");
sc->mii_dev = self;
sc->mii_inst = mii->mii_instance;
sc->mii_phy = ma->mii_phyno;
@ -169,6 +179,7 @@ igphyattach(device_t parent, device_t self, void *aux)
static void
igphy_load_dspcode(struct mii_softc *sc)
{
struct igphy_softc *igsc = (struct igphy_softc *) sc;
static const struct {
int reg;
uint16_t val;
@ -186,6 +197,18 @@ igphy_load_dspcode(struct mii_softc *sc)
};
int i;
/* This workaround is only for 82541 and 82547 */
switch (igsc->sc_mactype) {
case WM_T_82541:
case WM_T_82547:
case WM_T_82541_2:
case WM_T_82547_2:
break;
default:
/* byebye */
return;
}
delay(10);
PHY_WRITE(sc, MII_IGPHY_PAGE_SELECT, 0x0000);
@ -193,8 +216,19 @@ igphy_load_dspcode(struct mii_softc *sc)
delay(5);
for (i = 0; dspcode[i].reg != 0; i++)
IGPHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
switch (igsc->sc_mactype) {
case WM_T_82541:
case WM_T_82547:
for (i = 0; dspcode[i].reg != 0; i++)
IGPHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
break;
case WM_T_82541_2:
case WM_T_82547_2:
IGPHY_WRITE(sc, 0x1f73, 0x0099);
break;
default:
break;
}
PHY_WRITE(sc, MII_IGPHY_PAGE_SELECT,0x0000);
PHY_WRITE(sc, 0x0000, 0x3300);
@ -203,31 +237,34 @@ igphy_load_dspcode(struct mii_softc *sc)
static void
igphy_reset(struct mii_softc *sc)
{
struct igphy_softc *igsc = (struct igphy_softc *) sc;
uint16_t fused, fine, coarse;
mii_phy_reset(sc);
igphy_load_dspcode(sc);
fused = IGPHY_READ(sc, MII_IGPHY_ANALOG_SPARE_FUSE_STATUS);
if ((fused & ANALOG_SPARE_FUSE_ENABLED) == 0) {
fused = IGPHY_READ(sc, MII_IGPHY_ANALOG_FUSE_STATUS);
if (igsc->sc_mactype == WM_T_82547) {
fused = IGPHY_READ(sc, MII_IGPHY_ANALOG_SPARE_FUSE_STATUS);
if ((fused & ANALOG_SPARE_FUSE_ENABLED) == 0) {
fused = IGPHY_READ(sc, MII_IGPHY_ANALOG_FUSE_STATUS);
fine = fused & ANALOG_FUSE_FINE_MASK;
coarse = fused & ANALOG_FUSE_COARSE_MASK;
fine = fused & ANALOG_FUSE_FINE_MASK;
coarse = fused & ANALOG_FUSE_COARSE_MASK;
if (coarse > ANALOG_FUSE_COARSE_THRESH) {
coarse -= ANALOG_FUSE_COARSE_10;
fine -= ANALOG_FUSE_FINE_1;
} else if (coarse == ANALOG_FUSE_COARSE_THRESH)
fine -= ANALOG_FUSE_FINE_10;
if (coarse > ANALOG_FUSE_COARSE_THRESH) {
coarse -= ANALOG_FUSE_COARSE_10;
fine -= ANALOG_FUSE_FINE_1;
} else if (coarse == ANALOG_FUSE_COARSE_THRESH)
fine -= ANALOG_FUSE_FINE_10;
fused = (fused & ANALOG_FUSE_POLY_MASK) |
(fine & ANALOG_FUSE_FINE_MASK) |
(coarse & ANALOG_FUSE_COARSE_MASK);
fused = (fused & ANALOG_FUSE_POLY_MASK) |
(fine & ANALOG_FUSE_FINE_MASK) |
(coarse & ANALOG_FUSE_COARSE_MASK);
IGPHY_WRITE(sc, MII_IGPHY_ANALOG_FUSE_CONTROL, fused);
IGPHY_WRITE(sc, MII_IGPHY_ANALOG_FUSE_BYPASS,
ANALOG_FUSE_ENABLE_SW_CONTROL);
IGPHY_WRITE(sc, MII_IGPHY_ANALOG_FUSE_CONTROL, fused);
IGPHY_WRITE(sc, MII_IGPHY_ANALOG_FUSE_BYPASS,
ANALOG_FUSE_ENABLE_SW_CONTROL);
}
}
PHY_WRITE(sc, MII_IGPHY_PAGE_SELECT,0x0000);
}
@ -376,6 +413,19 @@ igphy_smartspeed_workaround(struct mii_softc *sc)
struct igphy_softc *igsc = (struct igphy_softc *) sc;
uint16_t reg, gtsr, gtcr;
/* This workaround is only for 82541 and 82547 */
switch (igsc->sc_mactype) {
case WM_T_82541:
case WM_T_82541_2:
case WM_T_82547:
case WM_T_82547_2:
break;
default:
/* byebye */
return;
}
if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0)
return;

View File

@ -1,4 +1,4 @@
/* $NetBSD: if_wm.c,v 1.181 2009/11/26 15:17:10 njoly Exp $ */
/* $NetBSD: if_wm.c,v 1.182 2009/12/16 04:50:35 msaitoh Exp $ */
/*
* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
@ -76,7 +76,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.181 2009/11/26 15:17:10 njoly Exp $");
__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.182 2009/12/16 04:50:35 msaitoh Exp $");
#include "bpfilter.h"
#include "rnd.h"
@ -129,6 +129,7 @@ __KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.181 2009/11/26 15:17:10 njoly Exp $");
#include <dev/pci/pcidevs.h>
#include <dev/pci/if_wmreg.h>
#include <dev/pci/if_wmvar.h>
#ifdef WM_DEBUG
#define WM_DEBUG_LINK 0x01
@ -229,31 +230,6 @@ struct wm_rxsoft {
bus_dmamap_t rxs_dmamap; /* our DMA map */
};
typedef enum {
WM_T_unknown = 0,
WM_T_82542_2_0, /* i82542 2.0 (really old) */
WM_T_82542_2_1, /* i82542 2.1+ (old) */
WM_T_82543, /* i82543 */
WM_T_82544, /* i82544 */
WM_T_82540, /* i82540 */
WM_T_82545, /* i82545 */
WM_T_82545_3, /* i82545 3.0+ */
WM_T_82546, /* i82546 */
WM_T_82546_3, /* i82546 3.0+ */
WM_T_82541, /* i82541 */
WM_T_82541_2, /* i82541 2.0+ */
WM_T_82547, /* i82547 */
WM_T_82547_2, /* i82547 2.0+ */
WM_T_82571, /* i82571 */
WM_T_82572, /* i82572 */
WM_T_82573, /* i82573 */
WM_T_82574, /* i82574 */
WM_T_80003, /* i80003 */
WM_T_ICH8, /* ICH8 LAN */
WM_T_ICH9, /* ICH9 LAN */
WM_T_ICH10, /* ICH10 LAN */
} wm_chip_type;
#define WM_LINKUP_TIMEOUT 50
/*
@ -953,6 +929,7 @@ wm_attach(device_t parent, device_t self, void *aux)
{
struct wm_softc *sc = device_private(self);
struct pci_attach_args *pa = aux;
prop_dictionary_t dict;
struct ifnet *ifp = &sc->sc_ethercom.ec_if;
pci_chipset_tag_t pc = pa->pa_pc;
pci_intr_handle_t ih;
@ -1004,6 +981,10 @@ wm_attach(device_t parent, device_t self, void *aux)
sc->sc_type = WM_T_82542_2_0;
}
/* Set device properties */
dict = device_properties(sc->sc_dev);
prop_dictionary_set_uint32(dict, "mactype", sc->sc_type);
/*
* Map the device. All devices support memory-mapped acccess,
* and it is really required for normal operation.
@ -1402,7 +1383,7 @@ wm_attach(device_t parent, device_t self, void *aux)
* Read the Ethernet address from the EEPROM, if not first found
* in device properties.
*/
ea = prop_dictionary_get(device_properties(sc->sc_dev), "mac-addr");
ea = prop_dictionary_get(dict, "mac-addr");
if (ea != NULL) {
KASSERT(prop_object_type(ea) == PROP_TYPE_DATA);
KASSERT(prop_data_size(ea) == ETHER_ADDR_LEN);
@ -1439,8 +1420,7 @@ wm_attach(device_t parent, device_t self, void *aux)
* Read the config info from the EEPROM, and set up various
* bits in the control registers based on their contents.
*/
pn = prop_dictionary_get(device_properties(sc->sc_dev),
"i82543-cfg1");
pn = prop_dictionary_get(dict, "i82543-cfg1");
if (pn != NULL) {
KASSERT(prop_object_type(pn) == PROP_TYPE_NUMBER);
cfg1 = (uint16_t) prop_number_integer_value(pn);
@ -1451,8 +1431,7 @@ wm_attach(device_t parent, device_t self, void *aux)
}
}
pn = prop_dictionary_get(device_properties(sc->sc_dev),
"i82543-cfg2");
pn = prop_dictionary_get(dict, "i82543-cfg2");
if (pn != NULL) {
KASSERT(prop_object_type(pn) == PROP_TYPE_NUMBER);
cfg2 = (uint16_t) prop_number_integer_value(pn);
@ -1464,8 +1443,7 @@ wm_attach(device_t parent, device_t self, void *aux)
}
if (sc->sc_type >= WM_T_82544) {
pn = prop_dictionary_get(device_properties(sc->sc_dev),
"i82543-swdpin");
pn = prop_dictionary_get(dict, "i82543-swdpin");
if (pn != NULL) {
KASSERT(prop_object_type(pn) == PROP_TYPE_NUMBER);
swdpin = (uint16_t) prop_number_integer_value(pn);

99
sys/dev/pci/if_wmvar.h Normal file
View File

@ -0,0 +1,99 @@
/* $NetBSD: if_wmvar.h,v 1.3 2009/12/16 04:50:36 msaitoh Exp $ */
/*
* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
* All rights reserved.
*
* Written by Jason R. Thorpe for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*******************************************************************************
Copyright (c) 2001-2005, Intel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. Neither the name of the Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************/
#ifndef _DEV_PCI_IF_WMVAR_H_
#define _DEV_PCI_IF_WMVAR_H_
typedef enum {
WM_T_unknown = 0,
WM_T_82542_2_0, /* i82542 2.0 (really old) */
WM_T_82542_2_1, /* i82542 2.1+ (old) */
WM_T_82543, /* i82543 */
WM_T_82544, /* i82544 */
WM_T_82540, /* i82540 */
WM_T_82545, /* i82545 */
WM_T_82545_3, /* i82545 3.0+ */
WM_T_82546, /* i82546 */
WM_T_82546_3, /* i82546 3.0+ */
WM_T_82541, /* i82541 */
WM_T_82541_2, /* i82541 2.0+ */
WM_T_82547, /* i82547 */
WM_T_82547_2, /* i82547 2.0+ */
WM_T_82571, /* i82571 */
WM_T_82572, /* i82572 */
WM_T_82573, /* i82573 */
WM_T_82574, /* i82574 */
WM_T_80003, /* i80003 */
WM_T_ICH8, /* ICH8 LAN */
WM_T_ICH9, /* ICH9 LAN */
WM_T_ICH10, /* ICH10 LAN */
} wm_chip_type;
#endif /* _DEV_PCI_IF_WMVAR_H_ */