- Clear the interrupt mask to ensure the device cannot assert its
interrupt line.
- Clear sc->sc_icr to ensure wm_intr() makes no attempt to service any
currently pending or shared interrupt.
This should address the problem reported in both PR/29903 and PR/22493.
(wm(4) is susceptible to crashing in wm_intr() when the interface is downed)
Actually initialize the interrupt throttling register.
Actually initialize the tx and tx absolute interrupt delay timer regs.
Update default values for the rx and tx delay timers.
Inspired by Zdenek Salvet in PR kern/29373.
attempt to map the I/O BAR if it is 0. This will have the side-effect
of causing the wm_reset() routine to fall back to memory BAR accesses
for those chips on which it would attempt I/O BAR accesses for the reset.
Also update the comments about why we attempt the I/O BAR accesses for
the reset in favor of the memory BAR accesses.
make sure that the pullup was done into trailing space at the end of
the existing first-mbuf-in-chain. If not, log an error and drop the
packet, because the mbuf chain no longer corresponds to the DMA map,
and we are already committed to transmitting the packet.
- Change the Tx:Rx on-chip RAM allocation ratio based on MTU:
=> 82547: > 8192 18K:22K, else 10K:30K
=> others: > 8192 24K:40K, else 16K:48K
Values derived from Linux driver.
- On the 82547, keep track of how much of the Tx FIFO has been used.
When in half-duplex mode, don't let packets wrap around the FIFO ring
buffer, because that causes the chip to croak. Detect this, stall the
Tx queue, use a timer to wait for the packets to drain from the Tx FIFO,
reset the internal FIFO pointers, and restart the Tx queue. Basic
algorithm (and some magic numbers) derived from FreeBSD and Linux drivers.
on transmit.
- On 82544 and up, allocate 4096 Tx descriptors rather than just 256.
82543 and down must still use 256, due to errata.
- Allow up to 256 DMA segments per packet. I have observed some truly
pathological mbuf chains under certain (admittedly uncommon) workloads
when jumbo frames are in use.
Tested on macppc by HATANO Hiromichi.
Note I guess this bug could be fixed only adding one htole32(),
but I'd rather clean up endianness handling:
- Use htole32() only to accesses against DMA descriptors.
- Don't use uint32_t union member with htole32()/le32toh()
to access uint8_t/uint16_t descriptors.
- Add le32toh() in some DPRINTF.
(XXX: strictly speaking, bus_dmamap_sync() is needed for these DPRINTF)
thorpej