Commit Graph

195 Commits

Author SHA1 Message Date
bjh21
8bd749851d Special locking primitives for use in Hydra kernels. These include a cache
invalidation after every lock to ensure that changes made by other CPUs are
visible.  This has nasty performance implications, but it does allow my
Hydrated Risc PC to run printf() on all its CPUs at once without corrupting
the message buffer.
2002-10-07 23:23:53 +00:00
bjh21
c62984115f Turn curcpu() into a macro.
Rename cpu_info_array to cpu_info and make it public.
Add CPU_FOREACH() and friends.
2002-10-06 18:28:48 +00:00
bjh21
1f17ac8831 Remove footbridge and isadma glue -- these no longer seem to be necessary. 2002-10-06 13:05:39 +00:00
bjh21
682415134d Call cpu_setup() and cpu_attach() from cpu_hydra_hatch().
Also simplify cpu_hydra_attach() somewhat.
2002-10-06 12:37:59 +00:00
bjh21
c775c3e73c Give each CPU a struct cpu_info, and have curcpu() return the right one.
Also have cpu_boot_secondary_processors() un-halt all the slave CPUs, and
have them do something visible when that happens.
2002-10-06 11:34:12 +00:00
bjh21
8e25492f64 Make cpu_number() work. 2002-10-06 10:21:50 +00:00
bjh21
f68de9a752 Use HYDRA_ID_SLAVE_MASK rather than 3.
No need for an infinite loop after we jump out of hydra_hatchcode.
2002-10-06 10:21:10 +00:00
provos
2f7a0aaac8 add SYSTRACE; approved perry. 2002-10-06 02:11:54 +00:00
bjh21
bb6b27b143 Second phase of Hydra attachment: All CPUs are now set up sufficiently that
they can call printf(), which they do before halting.
2002-10-05 23:30:03 +00:00
bjh21
389f612a10 Remove spurious comment. 2002-10-05 23:26:48 +00:00
chs
ecdf1b4084 add missing protos, clean up includes. 2002-10-05 17:16:33 +00:00
bjh21
3832819227 Minimal changes to allow a kernel with "options MULTIPROCESSOR" to compile
and boot multi-user on a single-processor machine.  Many of these changes
are wildly inappropriate for actual multi-processor operation, and correcting
this will be my next task.
2002-10-05 13:46:57 +00:00
bjh21
7e6e75483b Don't define DEBUG if it's already defined. 2002-10-04 22:46:29 +00:00
elric
d19d268a95 assign majors for raw and cooked cgd's. 2002-10-04 18:28:24 +00:00
chris
5dded94793 Fixup IPL_LEVELS to be correct. This matches the change I did to footbridge
based systems.  Untested on shark, but is the right thing to do.  I suspect
the original arm32 intr.h had the bug, and when the ports split we just took
the bug.
2002-10-04 10:21:33 +00:00
thorpej
7c0e5bcc4b Fix script-o's in previous. 2002-10-02 03:31:58 +00:00
thorpej
5a9ddc1422 Use CFATTACH_DECL(). 2002-10-02 02:21:20 +00:00
bjh21
92c36acca6 Report the hardware version in case anyone's interested (I was). 2002-10-01 22:52:22 +00:00
bjh21
cef90c2dc7 Constify ide_versions. 2002-10-01 22:38:56 +00:00
bjh21
7e08b73e47 Use CFATTACH_DECL(). 2002-10-01 22:23:52 +00:00
bjh21
8b39ec99a9 Add a shutdown hook which puts the Hydra back into its post-reset state,
largely to ensure that we don't leave the slave CPUs running when we go
back to RISC OS.
2002-10-01 22:18:00 +00:00
bjh21
b59e2e1320 Beginnings of support for the Simtec Hydra multiprocessor board.
So far, the Hydra is detected and initialised, and each slave CPU is
spun up briefly to check that it works.
2002-09-30 23:22:05 +00:00
thorpej
9a711d6985 Declare all cfattach structures const. 2002-09-27 20:29:02 +00:00
provos
0f09ed48a5 remove trailing \n in panic(). approved perry. 2002-09-27 15:35:29 +00:00
thorpej
6c88de3b53 Introduce a new routine, config_match(), which invokes the
cfattach->ca_match function in behalf of the caller.  Use it
rather than invoking cfattach->ca_match directly.
2002-09-27 03:17:40 +00:00
lukem
3ea2e21f82 enable USERCONF by default; it's small and extremely useful to have available. 2002-09-18 02:43:53 +00:00
bjh21
325b2641c5 Cleanup: Remove no-longer-accurate comment, un-__P, ANSIfy, __KERNEL_RCSID,
other light KNF.
2002-09-15 11:27:47 +00:00
bjh21
166f9fdf01 Allocate channel structures as part of the softc rather than malloc'ing them
at run time.  This simplifies the code and avoids problems with uninitialised
variables, and if it's good enough for pciide(4), it's good enough for me.

Also normalise the prefix for channel-specific messages.
2002-09-15 11:00:11 +00:00
bjh21
9da7134dd1 On ARCIN v6 cards, clear the EPROM page latch on shutdown. This seems to be
necessary to allow the card to be detected afterwards.  In theory, this
shouldn't be necessary, since we don't touch the page latch yet, but I'm not
going to argue.
2002-09-14 18:12:16 +00:00
thorpej
c0691fd89d Back out previous; it breaks binary compatibility between platforms
in the same MACHINE_ARCH.
2002-09-14 15:54:00 +00:00
mycroft
e9a1e15d7e Move some #defines out of _KERNEL. 2002-09-14 12:58:37 +00:00
gehenna
77a6b82b27 Merge the gehenna-devsw branch into the trunk.
This merge changes the device switch tables from static array to
dynamically generated by config(8).

- All device switches is defined as a constant structure in device drivers.

- The new grammer ``device-major'' is introduced to ``files''.

	device-major <prefix> char <num> [block <num>] [<rules>]

- All device major numbers must be listed up in port dependent majors.<arch>
  by using this grammer.

- Added the new naming convention.
  The name of the device switch must be <prefix>_[bc]devsw for auto-generation
  of device switch tables.

- The backward compatibility of loading block/character device
  switch by LKM framework is broken. This is necessary to convert
  from block/character device major to device name in runtime and vice versa.

- The restriction to assign device major by LKM is completely removed.
  We don't need to reserve LKM entries for dynamic loading of device switch.

- In compile time, device major numbers list is packed into the kernel and
  the LKM framework will refer it to assign device major number dynamically.
2002-09-06 13:18:43 +00:00
chris
a4e86e6cd5 Found the issue with the kinetic bootloader.
Seems that we assume that the dram blocks are sorted, and that the first/lowest address is also where the kernel is.

If the above is not true, then we're on a kinetic (probably should make a better way to indicate this)  So search for all dram blocks < with starting addr lower than the first block and remove them.

Currently there's minimal performance gain (which is odd as the SDRAM is meant to be faster, I'm wondering if we need to prod some hidden registers to set timing information.

Note that I still get 16MB/s compared with 7MB/s on RiscStation and 93MB/s on my cats.  I'm thinking that something else is seriously nasty on acorn32.
2002-09-03 23:00:40 +00:00
thorpej
77a6866508 Enable caching on kernel and user page tables. This saves having
to do uncached memory access during VM operations (which can be
quite expensive on some CPUs).

We currently write-back PTEs as soon as they're modified; there is
some room for optimization (to write them back in larger chunks).
For PTEs in the APTE space (i.e. PTEs for pmaps that describe another
process's address space), PTEs must also be evicted from the cache
complete (PTEs in PTE space will be evicted durint a context switch).
2002-08-24 02:16:30 +00:00
thorpej
6cc7c1c1ff * Add PTE_SYNC() and PTE_SYNC_RANGE() macros. These don't actually do
anything yet.
* Use PTE_SYNC() and PTE_SYNC_RANGE() in some obvious places, i.e.
  where vtopte() is used.
2002-08-22 01:13:53 +00:00
thorpej
5fddbbe3d5 Do cached memory access to L1 tables, making sure to write-back the
cache after any L1 table modifications.
2002-08-21 18:34:31 +00:00
bjh21
a0549f1aba Remove comment claiming that csc(4) doesn't work. 2002-08-07 14:42:42 +00:00
bjh21
d057306739 Enable csc(4), since it seems to be working now. 2002-08-07 13:40:26 +00:00
briggs
0b956d0b8b Implement pmc(9) -- An interface to hardware performance monitoring
counters.  These counters do not exist on all CPUs, but where they
do exist, can be used for counting events such as dcache misses that
would otherwise be difficult or impossible to instrument by code
inspection or hardware simulation.

pmc(9) is meant to be a general interface.  Initially, the Intel XScale
counters are the only ones supported.
2002-08-07 05:14:47 +00:00
bjh21
a69295fb3b Enable csc(4), since it's reported as working. 2002-08-05 23:30:44 +00:00
bjh21
ed8346a525 Rather than forcing on XS_POLL in SCSI transfers ourselves, set
SCSIPI_ADAPT_POLL_ONLY to tell the MI scsipi layer to do it for us.  This,
plus G/Cing some debugging code, removes the card-specific scsi_request
wrappers.
2002-08-05 23:30:04 +00:00
thorpej
79af00bddb Move the calls to uvm_page_physload() out of pmap_bootstrap() and
into platform-specific initialization code, giving platform-specific
code control over which free list a given chunk of memory gets put
onto.

Changes are essentially mechanical.  Test compiled for all ARM
platforms, test booted on Intel IQ80321 and Shark.

Discussed some time ago on port-arm.
2002-07-31 00:20:51 +00:00
thorpej
d3aa5664b7 Move the uvm_setpagesize() call to platform-dependent code in preparation
for other changes to pmap_bootstrap().
2002-07-30 16:16:38 +00:00
hannken
ba3784ca91 Convert to new device buffer queue interface.
Approved by: Reinoud Zandijk <reinoud@netbsd.org>
2002-07-27 11:09:35 +00:00
thorpej
3912e469dd Rename cdev_systrace_init() to cdev_clonemisc_init(), so it can
be properly used by any misc. cloning device.  While here, correct
a comment to indicate that "open" is the only entry point and that
everything else is handled with fileops.
2002-07-19 16:38:14 +00:00
abs
eb73becae2 Ensure all INSTALL config files consistantly include PIPE_SOCKETPAIR,
MALLOC_NOINLINE, and VNODE_OP_NOINLINE. The exceptions are when they
include another config files that already defines the options, or if
they are for an embedded board, just define a few extra options, and
do not already define PIPE_SOCKETPAIR.
2002-07-05 13:40:10 +00:00
bjh21
06eecc6ca0 $Id$ -> $NetBSD$ (oops). 2002-06-19 23:27:48 +00:00
christos
3b50728cf4 MD systrace gluons. 2002-06-17 16:32:57 +00:00
lukem
fde6ae6f04 Enable "pseudo-device clockctl" in all kernels, except
installation related kernels (INSTALL* and RAMDISK*).
This enables rc.conf(5) $ntpd_chroot to be used "out of the box"
2002-06-17 05:14:02 +00:00
bjh21
5ed34fe182 Kill options XSERVER: nothing referred to it anyway. 2002-06-16 12:14:30 +00:00