Second phase of Hydra attachment: All CPUs are now set up sufficiently that
they can call printf(), which they do before halting.
This commit is contained in:
bjh21
parent
389f612a10
commit
bb6b27b143
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@ -1,4 +1,4 @@
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# $NetBSD: genassym.cf,v 1.2 2001/12/20 01:20:21 thorpej Exp $
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# $NetBSD: genassym.cf,v 1.3 2002/10/05 23:30:03 bjh21 Exp $
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# Copyright (c) 1982, 1990 The Regents of the University of California.
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# All rights reserved.
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@ -35,6 +35,7 @@
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# SUCH DAMAGE.
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include <machine/intr.h>
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include <arch/acorn32/acorn32/hydravar.h>
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define IH_FUNC offsetof(struct irqhandler, ih_func)
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define IH_ARG offsetof(struct irqhandler, ih_arg)
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@ -44,3 +45,8 @@ define IH_NUM offsetof(struct irqhandler, ih_num)
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define IH_MASKADDR offsetof(struct irqhandler, ih_maskaddr)
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define IH_MASKBITS offsetof(struct irqhandler, ih_maskbits)
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define IH_NEXT offsetof(struct irqhandler, ih_next)
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define HB_TTB offsetof(struct hydraboot_vars, hb_ttb)
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define HB_BOOTPAGE_PA offsetof(struct hydraboot_vars, hb_bootpage_pa)
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define HB_SP offsetof(struct hydraboot_vars, hb_sp)
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define HB_ENTRY offsetof(struct hydraboot_vars, hb_entry)
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@ -1,4 +1,4 @@
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/* $NetBSD: hydra.c,v 1.6 2002/10/05 13:46:57 bjh21 Exp $ */
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/* $NetBSD: hydra.c,v 1.7 2002/10/05 23:30:03 bjh21 Exp $ */
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/*-
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* Copyright (c) 2002 Ben Harris
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@ -29,7 +29,7 @@
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#include <sys/param.h>
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__KERNEL_RCSID(0, "$NetBSD: hydra.c,v 1.6 2002/10/05 13:46:57 bjh21 Exp $");
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__KERNEL_RCSID(0, "$NetBSD: hydra.c,v 1.7 2002/10/05 23:30:03 bjh21 Exp $");
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#include <sys/device.h>
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#include <sys/systm.h>
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@ -39,6 +39,7 @@ __KERNEL_RCSID(0, "$NetBSD: hydra.c,v 1.6 2002/10/05 13:46:57 bjh21 Exp $");
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#include <arch/arm/mainbus/mainbus.h>
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#include <arch/acorn32/acorn32/hydrareg.h>
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#include <arch/acorn32/acorn32/hydravar.h>
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#include "locators.h"
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@ -64,10 +65,19 @@ static void hydra_shutdown(void *);
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static void hydra_reset(struct hydra_softc *);
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static int cpu_hydra_match(struct device *, struct cfdata *, void *);
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static void cpu_hydra_attach(struct device *, struct device *, void *);
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static void cpu_hydra_hatch(void);
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CFATTACH_DECL(hydra, sizeof(struct hydra_softc),
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hydra_match, hydra_attach, NULL, NULL);
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CFATTACH_DECL(cpu_hydra, sizeof(struct device),
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cpu_hydra_match, cpu_hydra_attach, NULL, NULL);
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extern char const hydra_bootcode[], hydra_ebootcode[];
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extern char const hydra_probecode[], hydra_eprobecode[];
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extern char const hydra_hatchcode[], hydra_ehatchcode[];
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static struct hydra_softc *the_hydra;
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static int
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hydra_match(struct device *parent, struct cfdata *cf, void *aux)
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@ -127,6 +137,9 @@ hydra_attach(struct device *parent, struct device *self, void *aux)
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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if (the_hydra == NULL)
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the_hydra = sc;
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sc->sc_iot = mba->mb_iot;
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if (bus_space_map(sc->sc_iot, HYDRA_PHYS_BASE, HYDRA_PHYS_SIZE, 0,
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&sc->sc_ioh) != 0) {
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@ -191,8 +204,8 @@ hydra_probe_slave(struct hydra_softc *sc, int slave)
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bus_space_handle_t ioh = sc->sc_ioh;
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int i, ret;
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memcpy((caddr_t)sc->sc_bootpage_va, hydra_bootcode,
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hydra_ebootcode - hydra_bootcode);
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memcpy((caddr_t)sc->sc_bootpage_va, hydra_probecode,
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hydra_eprobecode - hydra_probecode);
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bus_space_write_1(iot, ioh, HYDRA_MMU_SET, 1 << slave);
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bus_space_write_1(iot, ioh, HYDRA_HALT_SET, 1 << slave);
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bus_space_write_1(iot, ioh, HYDRA_RESET, 1 << slave);
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@ -269,6 +282,89 @@ hydra_reset(struct hydra_softc *sc)
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bus_space_write_1(iot, ioh, HYDRA_MMU_CLR, 0xf);
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}
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static int
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cpu_hydra_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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/* If there's anything there, it's a CPU. */
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return 1;
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}
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static void
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cpu_hydra_attach(struct device *parent, struct device *self, void *aux)
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{
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struct hydra_softc *sc = (void *)parent;
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struct hydra_attach_args *ha = aux;
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int slave = ha->ha_slave;
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bus_space_tag_t iot = sc->sc_iot;
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bus_space_handle_t ioh = sc->sc_ioh;
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int i, ret, error;
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vaddr_t uaddr;
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struct hydraboot_vars *hb;
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/*
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* Generate a kernel stack and PCB (in essence, a u-area) for the
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* new CPU.
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*/
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uaddr = uvm_uarea_alloc();
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error = uvm_fault_wire(kernel_map, uaddr, uaddr + USPACE,
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VM_FAULT_WIRE, VM_PROT_READ | VM_PROT_WRITE);
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if (error)
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panic("cpu_hydra_attach: uvm_fault_wire failed: %d", error);
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/* Copy hatch code to boot page, and set up arguments */
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memcpy((caddr_t)sc->sc_bootpage_va, hydra_hatchcode,
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hydra_ehatchcode - hydra_hatchcode);
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KASSERT(hydra_ehatchcode - hydra_hatchcode <= HYDRABOOT_VARS);
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hb = (struct hydraboot_vars *)(sc->sc_bootpage_va + HYDRABOOT_VARS);
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hb->hb_ttb = (paddr_t)curproc->p_addr->u_pcb.pcb_pagedir;
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hb->hb_bootpage_pa = sc->sc_bootpage_pa;
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hb->hb_sp = uaddr + USPACE;
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hb->hb_entry = &cpu_hydra_hatch;
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cpu_drain_writebuf();
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bus_space_write_1(iot, ioh, HYDRA_MMU_SET, 1 << slave);
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bus_space_write_1(iot, ioh, HYDRA_HALT_SET, 1 << slave);
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bus_space_write_1(iot, ioh, HYDRA_RESET, 1 << slave);
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bus_space_write_1(iot, ioh, HYDRA_HALT_CLR, 1 << slave);
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bus_space_write_1(iot, ioh, HYDRA_RESET, 0);
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ret = 0;
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for (i = 0; i < 100000; i++) {
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if ((bus_space_read_1(iot, ioh, HYDRA_HALT_STATUS) &
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(1 << slave)) != 0) {
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ret = 1;
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break;
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}
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}
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bus_space_write_1(iot, ioh, HYDRA_HALT_SET, 1 << slave);
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bus_space_write_1(iot, ioh, HYDRA_MMU_CLR, 1 << slave);
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cpu_dcache_inv_range((vaddr_t)hb, sizeof(*hb));
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if (ret == 0) {
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printf(": failed to spin up\n");
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return;
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}
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printf("\n");
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}
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static void
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cpu_hydra_hatch(void)
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{
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struct hydra_softc *sc = the_hydra;
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bus_space_tag_t iot = sc->sc_iot;
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bus_space_handle_t ioh = sc->sc_ioh;
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int slave;
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slave = bus_space_read_1(iot, ioh, HYDRA_ID_STATUS) & 0x3;
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printf(": Number %d is alive!", slave);
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bus_space_write_1(iot, ioh, HYDRA_HALT_SET, 1 << slave);
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/* We only get here if someone resumes us. */
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for (;;)
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continue;
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}
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#ifdef MULTIPROCESSOR
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void
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cpu_boot_secondary_processors(void)
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@ -1,4 +1,4 @@
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/* $NetBSD: hydra_boot.S,v 1.1 2002/09/30 23:22:05 bjh21 Exp $ */
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/* $NetBSD: hydra_boot.S,v 1.2 2002/10/05 23:30:03 bjh21 Exp $ */
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/*-
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* Copyright (c) 2002 Ben Harris
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@ -31,28 +31,20 @@
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* hydra_boot.S - Code to run on a Hydra slave CPU when it comes out of reset.
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*/
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#include "assym.h"
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#include <machine/asm.h>
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#include <arm/armreg.h>
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#include <arch/acorn32/acorn32/hydrareg.h>
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#include <arch/acorn32/acorn32/hydravar.h>
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RCSID("$NetBSD: hydra_boot.S,v 1.1 2002/09/30 23:22:05 bjh21 Exp $")
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RCSID("$NetBSD: hydra_boot.S,v 1.2 2002/10/05 23:30:03 bjh21 Exp $")
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ENTRY_NP(hydra_bootcode)
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ENTRY_NP(hydra_probecode)
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/*
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* This code is mapped in at physical address zero when a CPU
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* hatches, so it forms the vector table until the Hydra MMU
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* is turned off and the CPU MMU is turned on. Any exception
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* apart from a reset just puts us in a tight loop.
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* is probed. It just halts the CPU as quickly as possible.
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*/
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b Lhydra_reset /* Reset */
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b . /* Undefined instruction */
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b . /* SWI */
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b . /* Prefetch abort */
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b . /* Data abort */
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b . /* Address exception */
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b . /* IRQ */
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b . /* FIQ */
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Lhydra_reset:
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mov r0, #HYDRA_PHYS_BASE
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ldr r1, [r0, #(HYDRA_ID_STATUS << 2)]
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and r1, r1, #3 /* Mask off slave ID */
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@ -62,5 +54,63 @@ Lhydra_reset:
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b . /* Get here if we're released */
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.align 0
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.global _C_LABEL(hydra_ebootcode)
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_C_LABEL(hydra_ebootcode):
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.global _C_LABEL(hydra_eprobecode)
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_C_LABEL(hydra_eprobecode):
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/* Code called when spinning up a slave CPU for real. */
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ENTRY_NP(hydra_hatchcode)
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/*
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* r0-r3: scratch
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* r4: &hydraboot_vars
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* r5: control reg
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*/
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mov r4, #HYDRABOOT_VARS
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/* Enable 32-bit program and data space. */
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mov r5, #(CPU_CONTROL_32BP_ENABLE | CPU_CONTROL_32BD_ENABLE)
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mcr p15, 0, r5, c1, c0, 0
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/* Switch to SVC32 mode. */
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mrs r0, cpsr
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bic r0, r0, #PSR_MODE
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orr r0, r0, #PSR_SVC32_MODE
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msr cpsr_c, r0
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/* Switch to using the real physical address for this page. */
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ldr r0, [r4, #HB_BOOTPAGE_PA]
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add r4, r4, r0
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add pc, pc, r0
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mov r0, r0
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mov r0, r0
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/* Disable Hydra MMU for this processor. */
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mov r0, #HYDRA_PHYS_BASE
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ldr r1, [r0, #(HYDRA_ID_STATUS << 2)]
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and r1, r1, #3 /* Mask off slave ID */
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mov r2, #1
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mov r2, r2, lsl r1 /* Get the bit for this CPU */
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str r2, [r0, #(HYDRA_MMU_CLR << 2)] /* Disable MMU */
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/* Set TTB */
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ldr r0, [r4, #HB_TTB]
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mcr p15, 0, r0, c2, c0, 0
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/* Flush TLB */
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mov r0, #0
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mcr p15, 0, r0, c5, c0, 0
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/* Get start address */
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ldr r0, [r4, #HB_ENTRY]
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/* Set up stack */
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ldr sp, [r4, #HB_SP]
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mov fp, #0
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mov lr, #0
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/* Enable MMU */
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orr r5, r5, #CPU_CONTROL_MMU_ENABLE
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orr r5, r5, #CPU_CONTROL_SYST_ENABLE
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mcr p15, 0, r5, c1, c0, 0
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/* Run away before the pipeline runs out */
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mov pc, r0
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b .
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.align 0
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.global _C_LABEL(hydra_ehatchcode)
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_C_LABEL(hydra_ehatchcode):
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@ -0,0 +1,43 @@
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/* $NetBSD: hydravar.h,v 1.1 2002/10/05 23:30:03 bjh21 Exp $ */
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/*-
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* Copyright (c) 2002 Ben Harris
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Variables in the Hydra boot page used to pass critical data to a
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* newly-hatched CPU.
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*/
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#define HYDRABOOT_VARS 0x0f00
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#ifndef _LOCORE
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struct hydraboot_vars {
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paddr_t hb_ttb;
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paddr_t hb_bootpage_pa;
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register_t hb_sp;
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void (*hb_entry)(void);
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};
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#endif
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@ -1,4 +1,4 @@
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# $NetBSD: files.acorn32,v 1.15 2002/09/30 23:22:06 bjh21 Exp $
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# $NetBSD: files.acorn32,v 1.16 2002/10/05 23:30:03 bjh21 Exp $
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#
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# First try for arm-specific configuration info
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#
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@ -21,6 +21,7 @@ file dev/isa/isadma.c isadma needs-flag
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# Simtec Hydra multiprocessor system
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device hydra { slave = -1 }
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attach hydra at mainbus
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attach cpu at hydra with cpu_hydra
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file arch/acorn32/acorn32/hydra.c hydra needs-flag
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file arch/acorn32/acorn32/hydra_boot.S hydra needs-flag
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