become ippp (ISDN ppp) and irip (ISDN raw IP). The character device now
are called: /dev/isdn (isdnd <-> kernel communication), /dev/isdnctl (dialing
and other control), /dev/isdntrc* (tracing), /dev/isdnbchan* (raw B channel
access, i.e. for user land PPP) and /dev/isdntel* (telephone devices, i.e.
for answering machines).
tell nothing in the acorn32 port was using this version of
MEMORY_DISK_SIZE but I've left the code here incase the portmaster
wants it.
* rename MINIROOTSIZE to MEMORY_DISK_SIZE, so that all md(4) options
are consistently named
* fold opt_mdsize.h into opt_md.h
This has been on my TODO list for some time and i found it time to fix it
since its pretty simple to do.
The patch checks if the kernel is booted from the `UnixFS' RISC OS filing
system (case unimportant) and if so interprets its name to get the unix
file name the kernel has. If it doesn't see this prefix it will asume its
just called `netbsd'
Note that this has been compiled on some systems, cats, IQ80310, IPAQ, netwinder and shark (note that shark's build is currently broken due to other reasons), but only actually run on cats.
Shark doesn't make use of the functionality as I believe there has to be a correlation between OFW and the kernel tables so that calls into OFW work.
to the L1 table and a virtual address, and no pointer to the L2 table.
The L2 table will be looked up by pmap_map_entry(), which will panic
if the there is no L2 table for the requested VA.
NOTE: IT IS EXTREMELY IMPORTANT THAT THE CORRECT VIRTUAL ADDRESS
BE PROVIDED TO pmap_map_entry()! Notably, the code that mapped
the kernel L2 tables into the kernel PT mapping L2 table were not
passing actual virtual addresses, but rather offsets into the range
mapped by the L2 table. I have fixed up all of these call sites,
and tested the resulting kernel on both an IQ80310 and a Shark.
Other portmasters should examine their pmap_map_entry() calls if
their new kernels fail.
and let pmap_map_chunk() lookup the correct one to use for the
current VA. Eliminate the "l2table" argument to pmap_map_chunk().
Add a second L2 table for mapping kernel text/data/bss on the
IQ80310 (fixes booting kernels with ramdisks).
podulebussubmatch(), podulechunkdirectory() and podulesncan().
Fix argument types of podulebussubmatch().
Remove podloader_read_region(), since it's not used externally.
MACHINE_ARCH since <arm/param.h> already sets it correctly to "arm".
* For platforms which are not yet ELF, defined MACHINE_ARCH to "arm32"
if __ELF__ is not defined by the C preprocessor.
* In <arm/param.h>, clarify the rules about when MACHINE and
MACHINE_ARCH are defined, and to what. Also, for ELF platforms,
int the non-_KERNEL case, force both MACHINE and MACHINE_ARCH to "arm",
rather than allowing platform-specifc code to define either.
bootloader that also allows ELF symbols to be read correctly as well as
still having the posibility to boot older kernels with the `oldkernel'
option.
There is now support for upto 32 blocks of DRAM and a 16 blocks of VRAM.
Also preliminary support for specifying Mode Defintion Files (MDF) to the
kernel.
means that kernels from now on are not bootable by !BtRiscBSD but only with
!BtNetBSD.
Big initial commit for a new cleaned up and extended bootblock style. This
patch also allows ELF symbol tables to be read when the patches on the
bootloader are commit but will work fine with the older bootloader.
An extra option `oldkernel' will be provided in the newer bootloader to
pass out old style bootconfig's thus enabling old style kernels to load and
function.
Tested on a.out and ELF (preliminary) kernels with both older and new style
bootconfig blocks.
pass. Rather than providing a whole slew of cache operations that
aren't ever used, distill them down to some useful primitives:
icache_sync_all Synchronize I-cache
icache_sync_range Synchronize I-cache range
dcache_wbinv_all Write-back and Invalidate D-cache
dcache_wbinv_range Write-back and Invalidate D-cache range
dcache_inv_range Invalidate D-cache range
dcache_wb_range Write-back D-cache range
idcache_wbinv_all Write-back and Invalidate D-cache,
Invalidate I-cache
idcache_wbinv_range Write-back and Invalidate D-cache,
Invalidate I-cache range
Note: This does not yet include an overhaul of the actual asm files
that implement the primitives. Instead, we've provided a safe default
for each CPU type, and the individual CPU types can now be optimized
one at a time.
martin