Fixes probing of full-size 1GB Toshiba card made in 2008 that fails to
respond with a 1.8V supply. (JMB389 (in TS-RDF1) host claims
SDHC_VOLTAGE_SUPP_1_8V but does not claim SDHC_EMBEDDED_SLOT.)
can support one segment per operation. This is not the case with SDHCI SDMA,
the only SDHCI DMA mechanism we currently support in sdhc(4). Should fix
corrupt data on DMA-enabled SDHCI controllers claiming conformance to a SDHCI
Specification other than 1.0.
it can issue commands, and some host drivers have interrupt-driven
command completion. Prevents assertion (or deadlock) upon detach
of sdhc(4) with inserted card.
It seems to have caused regressions to detaching drivers from cards at
the appropriate time.
DETACH_FORCE to sdmmc_card_detach really means the SD/SDIO card is gone,
and can not be abused to mean that the host controller disappered.
has support for non-power-of-two divisors from 1 to 1023. Additionally
restore finding the correct power-of-two divisor for standard-compliant
pre-3.0 SDHCI parts. Also, calculate minimum divided clock for the
clkmsk-quirk parts correctly.
XXX Will future standard-compliant SDHCI versions have a SDHCI 3.0
backwards-compatible clock generator, or just SDHCI 1.0/2.0?
segment, the transfer is not implicitly complete; we still need to wait
for the transfer complete interrupt so that we can issue new commands
successfully.
This fixes the problem my Ricoh R5C822 was having where all writes after
a larger (64KiB) write were failing because we attempted to issue CMD13
(to check the status of the aformentioned write) too soon afterwards.
I suspect this fix to apply to other Ricoh SDHCI controllers I've heard
people have had trouble with. Sorry I didn't look at this sooner.
This should make multiple slot controllers, for example those with
a controller on more than one PCI/CardBus BAR, detach with fewer bugs.
Tested with as-of-yet-uncommited sdhc_pci changes on a single-host
ExpressCard JMicron JMB38[89].
host controller has disappeared or is detaching.
XXX should pass flags from sdmmc_detach through to the task thread ending
to differentiate host controller disappearance from mere detachment.
instead of just "<PNM>". Probably should figure out a way to stuff this
into the device properties database too, but not everything has
pseudo-device drvctl enabled.
Also, drop trailing whitespace.
On the AM335x, we first must wait for the controller to acknowledge
the reset; then we can wait for the reset to complete.
I believe this quirk also applies to the OMAP4 ES, but I don't have
one of those to test and we don't seem to have an obvious conditional
for it anyway.
This quirk may work for controllers that don't require it too, but I
am nervous about doing it by default because if we miss the reset
acknowledgement, then we'll just time out even though everything is
really hunky-dory.
Also, for all sdhc, don't bother writing 0 in sdhc_soft_reset while
waiting for the reset to complete; there is no need.
ok matt
This change makes sdhc_host_found allocate hp up front before showing
the identification, in order to avoid having to open-code a copy of
HREAD2 before hp is available.
drain of watermask words, pause a bit to give time for the fifo to recover.
Always the command response in BE byteorder. Rewrite __bitfield to deal
with this.
As we always want response data in LE, use bus_space_read_stream.
Additonally, read response data in 1 or 4 4-byte chunks, instead of
one 4-byte chunk or 15 1-byte chunks.
matt