Commit Graph

111 Commits

Author SHA1 Message Date
matt
6e8359f92f Add support for the valid card types in eMMC v4.4 (needed by beaglebone
black).
2013-05-03 16:38:35 +00:00
matt
2c6728a127 Fix typo. 2013-05-03 16:13:48 +00:00
jmcneill
e3bce41ef4 add SDHC_FLAG_NO_HS_BIT flag to prevent sdhc driver from setting the SDHC_HIGH_SPEED bit in SDHC_HOST_CTL, required to get many high speed cards working on rpi 2013-01-10 17:19:33 +00:00
jakllsch
2942f91989 If the command protocol calls for a trailing busy signal,
wait (up to 10 seconds) for it to be released.
2013-01-08 19:36:38 +00:00
jakllsch
85cce6af47 Find correct slot index in sdhc_cfprint(). 2013-01-07 02:56:24 +00:00
jakllsch
a08584ffdd SDHC_VOLTAGE_SUPP_1_8V is only valid in the presence of SDHC_EMBEDDED_SLOT.
Fixes probing of full-size 1GB Toshiba card made in 2008 that fails to
respond with a 1.8V supply.  (JMB389 (in TS-RDF1) host claims
SDHC_VOLTAGE_SUPP_1_8V but does not claim SDHC_EMBEDDED_SLOT.)
2012-12-24 06:09:50 +00:00
jakllsch
445b5303f6 Add a few more register bits from SDHCI 3.0.
Also, add comment to denote an ESDHC bit.
2012-12-24 05:43:34 +00:00
jakllsch
995fcf0db4 SMC_CAPS_DMA without SMC_CAPS_MULTI_SEG_DMA means we as a host driver only
can support one segment per operation.  This is not the case with SDHCI SDMA,
the only SDHCI DMA mechanism we currently support in sdhc(4).  Should fix
corrupt data on DMA-enabled SDHCI controllers claiming conformance to a SDHCI
Specification other than 1.0.
2012-12-23 22:33:09 +00:00
jakllsch
57df4d0ba0 We can't block our interrupt while sdmmc_detach_card is called, as
it can issue commands, and some host drivers have interrupt-driven
command completion.  Prevents assertion (or deadlock) upon detach
of sdhc(4) with inserted card.
2012-12-22 21:24:49 +00:00
jakllsch
cd889bc341 Revert sdmmc.c r1.18 (previous commit to this file).
It seems to have caused regressions to detaching drivers from cards at
the appropriate time.

DETACH_FORCE to sdmmc_card_detach really means the SD/SDIO card is gone,
and can not be abused to mean that the host controller disappered.
2012-12-22 20:21:09 +00:00
jakllsch
92ed62bd14 Add support for SDHCI 3.0 bus clock generation, which unlike 1.0 and 2.0
has support for non-power-of-two divisors from 1 to 1023. Additionally
restore finding the correct power-of-two divisor for standard-compliant
pre-3.0 SDHCI parts.  Also, calculate minimum divided clock for the
clkmsk-quirk parts correctly.

XXX Will future standard-compliant SDHCI versions have a SDHCI 3.0
backwards-compatible clock generator, or just SDHCI 1.0/2.0?
2012-12-22 03:56:58 +00:00
jakllsch
2dcbf90a93 If we get a SDMA boundary-crossing interrupt at the end of the final
segment, the transfer is not implicitly complete; we still need to wait
for the transfer complete interrupt so that we can issue new commands
successfully.

This fixes the problem my Ricoh R5C822 was having where all writes after
a larger (64KiB) write were failing because we attempted to issue CMD13
(to check the status of the aformentioned write) too soon afterwards.

I suspect this fix to apply to other Ricoh SDHCI controllers I've heard
people have had trouble with.  Sorry I didn't look at this sooner.
2012-12-20 22:56:38 +00:00
jakllsch
5e095f2d56 Change sdhc_detach so that it detaches all host controllers at once.
This should make multiple slot controllers, for example those with
a controller on more than one PCI/CardBus BAR, detach with fewer bugs.
Tested with as-of-yet-uncommited sdhc_pci changes on a single-host
ExpressCard JMicron JMB38[89].
2012-12-20 14:37:00 +00:00
jakllsch
36816376fd Only use DETACH_FORCE as flags argument to sdmmc_card_detach when the
host controller has disappeared or is detaching.
XXX should pass flags from sdmmc_detach through to the task thread ending
to differentiate host controller disappearance from mere detachment.
2012-12-20 14:24:11 +00:00
jakllsch
9ce0615950 fix off-by-one in switch function argument validation. 2012-12-20 03:51:04 +00:00
jakllsch
e4c8fcd833 It's also useful to compile-test before committing. 2012-12-15 00:07:47 +00:00
jakllsch
b6b4315a0f When debugging, it's useful to know what exactly failed. 2012-12-15 00:05:44 +00:00
jakllsch
557b68b349 Correctly read the 512-bit-wide big-endian Switch Function Status register.
Some of this could/will also be useful for the SD Status register.
2012-12-15 00:03:00 +00:00
jakllsch
cba25cf079 Display the whole CID register upon attach as "<MID:OID:PNM:PRV:PSN:MDT>"
instead of just "<PNM>".  Probably should figure out a way to stuff this
into the device properties database too, but not everything has
pseudo-device drvctl enabled.

Also, drop trailing whitespace.
2012-12-14 23:53:56 +00:00
jakllsch
1e178e5b0c The Card Command Class (CCC) field is valid in both SD_CSD_CSDVER_1_0
and SD_CSD_CSDVER_2_0.
2012-12-14 23:22:21 +00:00
riastradh
98770c509f Implement TI AM335x's SDHC reset quirk. Beaglebone SDHC works now!
On the AM335x, we first must wait for the controller to acknowledge
the reset; then we can wait for the reset to complete.

I believe this quirk also applies to the OMAP4 ES, but I don't have
one of those to test and we don't seem to have an obvious conditional
for it anyway.

This quirk may work for controllers that don't require it too, but I
am nervous about doing it by default because if we miss the reset
acknowledgement, then we'll just time out even though everything is
really hunky-dory.

Also, for all sdhc, don't bother writing 0 in sdhc_soft_reset while
waiting for the reset to complete; there is no need.

ok matt
2012-12-13 06:43:37 +00:00
matt
f726267fd1 Add sc_vendor_bus_clock hook
From jmcneill.
2012-12-12 15:15:31 +00:00
riastradh
8fd0d747ac Avoid the 16-bit read in sdhc_host_found for 32-bit-only devices.
This change makes sdhc_host_found allocate hp up front before showing
the identification, in order to avoid having to open-code a copy of
HREAD2 before hp is available.
2012-12-12 06:24:01 +00:00
kiyohara
a29e7e5640 Support omap3 SDHC driver. tested on OVERO only. 2012-10-29 13:30:25 +00:00
chs
cbab9cadce split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.
2012-10-27 17:17:22 +00:00
jakllsch
c2c9883c0b Make whitespace following preprocessor keywords consistent
with the predominating form in this file (that is, a space).
2012-10-15 13:38:52 +00:00
kiyohara
8966ac16da Fix variable name for message of printf. 2012-10-13 07:31:25 +00:00
joerg
ed602fb487 Don't use const foo const as type, one const is enough. 2012-09-13 21:44:49 +00:00
matt
48caf1182a Support deciphering SDHCv3 clock rates. 2012-08-31 01:44:20 +00:00
kiyohara
c3316e27d7 Print 'Standard Function Interface Code" in sdmmc_print(), if not SD_IO_SFIC_NO_STANDARD. 2012-08-04 04:06:00 +00:00
matt
fb6e3d730b Make PIO on normal SDHC devices work correctly on big-endian machines.
Add locking around interrupt manipulation (it should now be MP safe).
2012-07-30 00:56:01 +00:00
matt
99d4e3051d Only SDHC 1.0 controllers can do that fucky MULTI_SEG stuff. 2012-07-28 23:02:57 +00:00
jakllsch
84276f0edb sdhc(4) currently only implements support for the SDHC 1.0 DMA mechanism, so
only enable in that case.
2012-07-28 20:08:51 +00:00
matt
497c94cc1d Fix comments about __bitfield. 2012-07-28 18:38:03 +00:00
matt
c4e1f425c8 Fix a delay to a correct value. 2012-07-26 18:36:55 +00:00
matt
5440cc3372 MULTI_SEG does not for ESDHC. (Don't know how it works at all on any SDHC
but ...)
2012-07-26 18:36:09 +00:00
matt
64c1c6e064 Responses are actually in host order (except SCR which is return in
big endian so that's convert to host order).
2012-07-23 13:32:19 +00:00
skrll
0c3c3bcfc7 Provide a method for attachments to specify capabilites. 2012-07-21 16:14:05 +00:00
matt
752fce8819 Add use of watermark register when PIO to an ESDHC. After every kill or
drain of watermask words, pause a bit to give time for the fifo to recover.
Always the command response in BE byteorder.  Rewrite __bitfield to deal
with this.
2012-07-20 02:04:13 +00:00
matt
09369a733c If there was an error in 32-bit mode, just set ERROR_INTERRUPT otherwise
see if matched anything we care about.
2012-07-17 21:35:26 +00:00
skrll
720643c0b0 Handle interrupt acknowledgement in the SDHC_FLAG_32BIT_ACCESS case in
the same way as non-SDHC_FLAG_32BIT_ACCESS case.
2012-07-17 05:57:49 +00:00
skrll
786852f302 Whitespace. 2012-07-17 05:47:07 +00:00
jakllsch
eff06f78af bus_space_*_stream_N() functions are not universally available.
Provite alternate implementation for when they are unavailable.
2012-07-12 23:07:06 +00:00
jakllsch
2b7f084824 Completely rework (and enable) SDHC 1.0 DMA data transfer.
While without a large physically-contiguous buffer the performance
suffers severly, this should still be better than PIO.
2012-07-12 17:27:42 +00:00
jakllsch
6c3a659165 No need to panic on failure to find a divisor.
Additionally, add commented out calculation of actual clock frequency.
2012-07-12 17:15:27 +00:00
jakllsch
d30654f776 SDHC can have multiple slots, note which slot a specific sdmmc(4) attaches to. 2012-07-12 16:58:50 +00:00
jakllsch
5e33f0e797 SDHCI byte swaps the BE response on the wire into LE registers.
As we always want response data in LE, use bus_space_read_stream.
Additonally, read response data in 1 or 4 4-byte chunks, instead of
one 4-byte chunk or 15 1-byte chunks.
2012-07-12 16:46:48 +00:00
jakllsch
8a594cddf5 Add DMA boundary field shift and mask. 2012-07-12 16:34:30 +00:00
jakllsch
17d30e98ac Always enable and set block count register. We never do infinite transfers.
The old way seemed to be causing issues on a R5C822, at least with DMA enabled.
2012-07-12 16:32:34 +00:00
jakllsch
edab446c67 Add SD_STATUS (ACMD13) opcode. 2012-07-12 16:03:13 +00:00