4866f1a22b
Fix typo. s/extention/extension/
2001-07-05 08:38:24 +00:00
454a630dbd
Print both the lower and upper dbat register when printing dbat registers.
2001-06-30 02:03:16 +00:00
39fa08a172
Reset segment registers 1-7 upon entry to kernel (via trap or interrupts)
...
so that the bat spill code won't run into spurious valid user pages and
treat them as kernel pages. Restore segment registers 1-7 upon return to
user mode from either a trap or interrupt. XXX eventually do all 16 SRs
2001-06-30 01:24:13 +00:00
7c5977ea4f
Fix a spurious debug printf.
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Fix pmap_procwr to not check a NULL pvo. (Duh!)
Reformat pmap_print_mmuregs. Actually *fill in* the dbat registers.
2001-06-30 01:21:24 +00:00
03ff023c76
Onfault needs to be done even from interrupts so restore that. Default
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to EFAULT for the error.
2001-06-28 21:27:47 +00:00
6ca9622494
Add pmap_interrupt_* to pmap_*map_pa. Remove interrupt toggling from
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pmap_pte_spill. Fix pmap_protect. Macroize mfsrin instruction.
2001-06-28 20:35:21 +00:00
78c7d18804
Turn on PMAP_MAP_POOLPAGE
2001-06-28 20:31:37 +00:00
fdb7751e9c
Update for thorepj's UVM changes. Don't even try to call uvm_fault or do
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pcb_onfault recovery while in interrupt mode. Just die. Print out error
returned from uvm_fault (-1 for interrupts).
2001-06-28 18:33:39 +00:00
87a64549c4
Change a bcopy to a structure copy.
2001-06-28 15:23:39 +00:00
6bad4f04a0
Record any stack growth. This fixes a serious problem with core dumps.
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Without this change, coredumps will only contain one page of stack
regardless of how many pages of stack the process actually has.
2001-06-26 13:00:18 +00:00
f285587c4e
Fix typo in emac0 base address.
2001-06-25 01:49:15 +00:00
78cdef0bfc
Move on-chip 405GP devices to powerpc/ibm4xx/dev.
2001-06-24 02:13:37 +00:00
8980655597
Move 405GP registers, addresses and other info to ibm405gp.h. Leave only
...
board-specific addresses and other info in walnut.h.
2001-06-24 01:13:11 +00:00
7effaaaa7c
Disable interrupts when dealing with pvo lists. clean up some things.
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Keep track of executable ness of pages. Of sync icache executable pages.
2001-06-23 03:17:32 +00:00
dde0daca06
Use __asm __volatile. Use _POWERPC_SPR_H_
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Add PTE_RO/PTE_RW for old pmap.
2001-06-23 03:16:11 +00:00
e25aa0ea82
Use pmap_kenter_pa instead of pmap_enter for phys_map
2001-06-23 03:10:59 +00:00
5d30ec2c7e
Use SPR_xxx for the *MISS HASH CMP, etc.
2001-06-23 02:36:14 +00:00
363019a6c1
Add a db_active variable that indicates if a call to the debugger is
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active. Seems to be required by the MI com driver nowadays.
2001-06-22 11:40:41 +00:00
7fe4c3ba1d
Make this compile when DEBUG isn't defined.
2001-06-22 03:25:39 +00:00
41d73006f1
DMISS/DCMP/HASH1/HASH2/IMISS/ICMP/RPA are also valid on the MPC6XX
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(specially the 603 and maybe the 601)
2001-06-22 00:01:25 +00:00
6d3037579c
Change a debugging message a bit.
2001-06-21 22:05:50 +00:00
756d684c5a
Rename/enumerate the PTE protection bits to their real purposes.
2001-06-21 18:03:37 +00:00
467c0ed022
Rework pmap_bootstrap. Fix some comments. Add old copyright until i finish
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excising that code.
2001-06-21 03:26:12 +00:00
279833d138
Build for kgdb as well as for ddb (mutually exclusive).
2001-06-20 02:40:14 +00:00
d4bcd9c735
Add/change prototypes so that macpcc builds with -Wstrict-prototypes.
2001-06-19 12:02:55 +00:00
97b16e911f
Move the DSISR SPR bit definitions from <powerpc/mpc6xx/pte.h> to
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<powerpc/spr.h>. Remove unused ISI/SRR1 bit definitions.
2001-06-19 07:14:23 +00:00
59abdecf4b
Add a linux specific trapsignal() function. This is just a passthrough
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on all platforms but the i386. On the i386 we look at T_PROTFLT and send
a SIGSEGV instead of SIGBUS. This makes allegro lisp 5.0 and pvs (a proof
verification system) to work.
XXX[1]: We need to go through each architecture and verify that we send
the correct signal on each trap type.
XXX[2]: trap.c on all other architectures but i386 needs to be modified
to s/trapsignal/(*p->p_emul->e_trapsignal)/g
2001-06-18 02:04:42 +00:00
91f99e1981
Forgot to commit this -- move file .../bus_dma.c line to files.${machine}.
2001-06-17 19:32:17 +00:00
56151c1fef
Make this compile and work for the IBM 4xx series CPUs.
2001-06-17 13:39:33 +00:00
d70d5d1ee0
Use _C_LABEL() for externally referenced symbols.
2001-06-17 13:39:02 +00:00
0647591d3a
Globalise "trapexit" for new ddb tracing changes.
2001-06-17 13:38:33 +00:00
38fc9e283d
Fix pte_spill to set the index on the proper pvo. Deal with recursion
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in pmap_syncicache.
2001-06-16 03:32:48 +00:00
979edf3c4a
pmap_syncicache can be called recursively. Properly deal with that
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situation.
2001-06-15 22:28:54 +00:00
60f8375758
Replace printf with (*pr)
2001-06-15 22:27:07 +00:00
e55c9f74af
Add missing braces in pmap_pte_to_pvo (DEBUG|PMAPCHECK defined). Rearrange
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some code so that consistency check in pmap_pte_to_pvo do not trigger on
false positives. Correct/enhance some printfs.
2001-06-15 21:29:54 +00:00
25a2c4d481
While not stricly needed, to match pmap_pvo_find_va, mask of the page
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offset bits.
2001-06-15 20:53:45 +00:00
787e1b0b36
When comparing VA's, ignore the page offset bits.
...
Invert and strengthen a test for pte equality.
2001-06-15 20:43:01 +00:00
c7c7dab8f1
Stop overloading unused bits in the pte. Use the low 12bits of the vaddr
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instead to store them. Add a macro to fetch the vaddr without them.
Make all variables/routines prefixed with pmap_
Cleanup & fix some of the vsid bitmap usage.
Cleanup DEBUG printfs. Add some more checks to pmap_pvo_to_pte.
2001-06-15 18:26:06 +00:00
192642af05
Don't enable PMAPCHECK by default.
2001-06-15 08:17:00 +00:00
f6b81171c1
Globalize trapexit. Improve db_trace.c so that you can trace thru traps!
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Rework the output so that is also prints the frame address by default.
2001-06-15 08:09:33 +00:00
0278444e19
Add a check to pvo_check which makes sure the pte is really in the
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pteg_table. In pte_to_va, take into account if the PTE_HID is set.
2001-06-15 08:08:04 +00:00
ab92d9cd59
phys_map should use kenter/kremove
2001-06-15 08:07:03 +00:00
816a5637cd
When releasing the SR VSID, mask off the bits not related to the index
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in the pmap vsid bitmap.
2001-06-15 06:27:07 +00:00
18b2f7e6a1
Add a port to IBM's PPC405GP Reference Board (the "walnut")
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by Eduardo Horvath and Simon Burge of Wasabi Systems.
IBM 4xx series CPU features:
- New pmap and revised trap handler.
- Support on-chip timers, PCI controller, UARTs
- Framework for on-chip ethernet and watchdog timer.
General PowerPC features:
- Add in-kernel PPC floating point emulation
- New in{,4}_cksum that is between 1.5 and 5 times faster than the
old version depending on CPU type.
General changes:
- Kernel support for generic dbsym-style symbols.
2001-06-13 06:01:44 +00:00
713feac239
Include powerpc/mpc6xx/{bat.h,pte.h} if PPC_MPC6XX is defined.
2001-06-12 17:20:50 +00:00
0bdd2faeed
Get the opcode mask right for almost all the Op_OE opcodes (only two were
...
correct).
2001-06-12 05:31:44 +00:00
a3496ef8a8
When invoking the pcb_onfault mechanism, pass the return value of uvm_fault()
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to the onfault routine.
2001-06-10 16:31:59 +00:00
29d06d028c
Fix printf format error.
2001-06-10 15:54:05 +00:00
bedfcf904c
libkern.h is included in systm.h. Not needed here.
2001-06-10 15:05:44 +00:00
5a051092e4
Rename ofb_softc to ofbus_softc. (XXX Is this good name?)
2001-06-10 11:36:03 +00:00
toshii