Commit Graph

78 Commits

Author SHA1 Message Date
thorpej 8f70c6754b Add a work-around for the "short cable problem" that some DP83815
revisions have, as discussed on the soekris-tech mailing list a
while ago, whereby one can experience excessive recieve erros when
using < 30m cables.  The patch detects overflow in a DSP filter
parameter, and corrects it by writing a known good value.
2003-03-23 00:56:15 +00:00
briggs 85d93f8d10 Detect SMC EZ Card as 64-bit. Patch from Pavel Cahyna in kern/20680. 2003-03-13 13:57:01 +00:00
itojun 40606ab8f2 switch from kame-based m_aux mbuf auxiliary data, to openbsd m_tag
implementation.  it will simplify porting across *bsd (such as kame/altq),
and make us more synchronized.  from Joel Wilsson
2003-01-17 08:11:49 +00:00
tsutsui 238efe4697 Replace magic numbers for power management control with PCI_PMCSR* macros.
XXX Should we use pci_get_powerstate() and pci_set_powerstate() in pci.c?
2002-12-23 02:58:36 +00:00
scw 5b10944d66 Fix uninitialised variable warnings. 2002-11-24 12:06:12 +00:00
fair 8459c79958 Change the "dontcare" bits argument of ifmedia_init() to IFM_IMASK,
so that PHY instance is not siginificant in ifmedia_match(). This
is done to support multiple PHYs on the MII. Without this change,
ifmedia_set() would panic the system when no PHYs were matched.

I ran into this on an AMD EasyNow PC, which is built around SiS
system chips with an embedded SiS 900 core, and an external AMD
Am79c901 PHY, which presents two PHYs on the MII: one for HomePNA,
and one for standard 10base-T. The 10base-T PHY ends up with instance
number 1...
2002-10-17 01:17:30 +00:00
thorpej b75a007d9f Add trailing ; to CFATTACH_DECL. 2002-10-02 16:51:16 +00:00
thorpej 387fc6dc87 Use CFATTACH_DECL(). 2002-09-30 20:37:04 +00:00
thorpej f818766afe Declare all cfattach structures const. 2002-09-27 20:31:45 +00:00
thorpej d8e650d53a * The Netgear GA-621 is a 64-bit card, so add it to the 64-bit
quirk table.
* We want to hardwire BMSR_EXTSTAT, not BMSR_EXTCAP, when reading
  the TBI BMSR.
* Fetch the GPIO bits from the GPIOR register after an auto-load,
  rather than reading from the EEPROM directly.
2002-08-26 22:52:02 +00:00
itojun 9287c3fbb9 need to set wantinit variable 2002-08-26 07:38:34 +00:00
itojun 3931bcf3a3 suppress some of debugging output (IFF_DEBUG will re-enable it). PR 18069 2002-08-26 07:37:26 +00:00
itojun 7b0ecaee62 use RND_ENABLED() to avoid unneeded function call. should help if_gsip case. 2002-08-21 03:59:31 +00:00
itojun 76f65d83e3 attach random number source. 2002-08-20 00:35:46 +00:00
thorpej b9d86783bf * Hard-code EXTSR_1000XFDX|EXTSR_1000XHDX for reads of the MII_EXTSR
in the TBI case.
* Force BMSR_ANEG | BMSR_EXTCAP to be returned for reads of the MII_BMSR
  in the TBI case.
2002-08-16 07:10:56 +00:00
thorpej 1fa46f89f9 Preliminary support for the ten-bit interface on the DP83820. This
code needs more testing, and more bug fixing.
2002-08-10 22:57:15 +00:00
thorpej 5689818798 Don't treat the "reset complete" interrupts as errors. Doing so
causes us to go into a reset/interrupt/reset/... loop.
2002-08-10 22:54:54 +00:00
thorpej 37422dde7e Add 64-bit quirk for the Accton EN1407-T/Planex GN-1000TE. IDs provided
by SAITOH Masanobu <msaitoh@netbsd.org>.
2002-07-11 18:07:56 +00:00
thorpej 8eb0145183 Add a table of known-64-bit DP83820-based cards. Use this table
to enable 64-bit data transfers on 64-bit cards when plugged into
a 64-bit slot.  Right know the Asante GigaNIX is listed in that
table.

Sigh, there is an EEPROM bit that can be used to detect 64-bit vs
32-bit cards.  Unfortunately, at least 2 vendors of 32-bit cards
fail to clear the "DATA64_EN" bit in the EEPROM, which causes the
card to lose badly, because it still manages to detect that it's
plugged into a 64-bit PCI slot.  Yay, stupid hardware vendors.
2002-06-30 20:36:06 +00:00
thorpej 145fa4de8a Load configuration data from the EEPROM on the DP83820 differently: rather
than grovel the EEPROM directly, initiate an "EEPROM load" in the PCI
test register, and fetch the values from the CFG register.
2002-06-30 20:04:43 +00:00
thorpej b77065a9a2 Update the TODO list: We have some Tx interrupt mitigation now, so
we need to do Rx interrupt mitigation next.
2002-06-30 19:13:46 +00:00
thorpej c9983ba67f Be more aggressive in giving descriptors to the chip in the transmit
path: Instead of waiting for the if_snd queue to be drained before
giving ownership of the frist descriptor to the chip, do it after
sync'ing all the descriptors for a single packet.
2002-06-30 19:11:40 +00:00
thorpej 6caa2f6db1 Implement a sliding interrupt delay window for Tx interrupts. 2002-06-30 18:52:21 +00:00
thorpej 0f2cbd0361 * Give symbolic names to the CFG bits in the EEPROM.
* Get CFG_M64ADDR, CFG_T64ADDR, and CFG_DATA64_EN from the EEPROM.
  Note, we still disable CFG_M64ADDR and CFG_T64ADDR later (XXX need
  PCI bus capability flags for these).
* Print a message if we're in a 64-bit slot and 64-bit data is
  disabled in the EEPROM.  Make sure CFG_DATA64_EN is disabled if
  we're not in a 64-bit slot.
2002-06-30 18:04:12 +00:00
lukem 06de426449 SIMPLEQ rototill:
- implement SIMPLEQ_REMOVE(head, elm, type, field).  whilst it's O(n),
  this mirrors the functionality of SLIST_REMOVE() (the other
  singly-linked list type) and FreeBSD's STAILQ_REMOVE()
- remove the unnecessary elm arg from SIMPLEQ_REMOVE_HEAD().
  this mirrors the functionality of SLIST_REMOVE_HEAD() (the other
  singly-linked list type) and FreeBSD's STAILQ_REMOVE_HEAD()
- remove notes about SIMPLEQ not supporting arbitrary element removal
- use SIMPLEQ_FOREACH() instead of home-grown for loops
- use SIMPLEQ_EMPTY() appropriately
- use SIMPLEQ_*() instead of accessing sqh_first,sqh_last,sqe_next directly
- reorder manual page; be consistent about how the types are listed
- other minor cleanups
2002-06-01 23:50:52 +00:00
tron e10511905f Set initial transmit drain threshold to 1504 to avoid the problem
described in PR kern/16070. Change approved by Jason Thorpe.

XXX We'll should try to find a better adaptive scheme for the next
    NetBSD release.
2002-05-28 20:20:49 +00:00
thorpej a487a4b57a Bump the number of Tx DMA segments from 8 to 16 (the zero-copy socket
code sometimes sees more than 8).
2002-05-03 00:18:31 +00:00
briggs 6c8500d5e4 Erf. Actually use the symbolic name for the 630ET instead of a constant. 2002-03-27 21:42:45 +00:00
briggs 8faf9264bb Print the chip revision in the attach function.
Treat revision 0x84 of the SiS like other SIS630 variants.
Call revision 0x84 the 630ET (name from OpenBSD).
2002-03-27 21:41:35 +00:00
is 6963fa721e use the right endian ether_crc32 function in the multicast hash table computation 2002-03-24 11:00:17 +00:00
thorpej 8c51a03d7e If the upper layer says Write/Invalidate is okay, then make sure
it's enabled in the PCI CSR.
2002-02-28 23:52:37 +00:00
thorpej 2ba5de1eb1 Change the default Rx FIFO drain threshold to 128 bytes; this
reduces the likelihood of Rx FIFO overruns on machines with wimpy
PCI busses, while still allowing the interface to burst with a
reasonable size.
2002-02-28 20:08:11 +00:00
thorpej 07e108c7dc * On the DP83820, make sure to make the Tx DMA map large enough for
jumbo frames.
* Work around broken PXE firmware on some boards, which leave the ROM
  BAR enabled even after the PXE stack has been unloaded.
* Set up the initial values for sc_tx_fill_thresh, sc_tx_drain_thresh, and
  sc_rx_drain_thresh in sip_attach(), rather than in sip_init().
2002-02-28 19:10:16 +00:00
thorpej 8edba68a05 Fix problems associated with the SiS 635/735 on-board Ethernet,
from Stephen Degler <sdegler@degler.net>, port-i386/15261.
2002-02-09 21:04:02 +00:00
thorpej 16c96355a8 Fetch the MAC address from the NVRAM on the SiS 630 built-in Ethernet.
Based on PR 14665, Stephen Borrill <netbsd@precedence.co.uk>.
2001-12-20 03:32:31 +00:00
lukem 9048aaae21 add RCSID 2001-11-13 07:48:40 +00:00
thorpej bd35a1b7ed Make sure to initialize the all Rx descriptors properly in *_init()
even if mbufs for them are already allocated.
2001-07-23 17:26:50 +00:00
thorpej 44e529fecc Use BUS_DMA_READ and BUS_DMA_WRITE in some obvious places. 2001-07-19 16:36:14 +00:00
thorpej bc5d06ea08 Some cosmetic shuffling. 2001-07-08 17:15:45 +00:00
thorpej 9de94b45cc Fix a very, very dumb mistake that broke multicast on the dp83815
and dp83820.
2001-07-08 16:56:50 +00:00
thorpej 62794086ea Change the structure of dp83815_set_filter ever so slightly. 2001-07-07 17:37:39 +00:00
thorpej 7e92a47db9 bcmp -> memcmp 2001-07-07 16:47:43 +00:00
thorpej 9ec2341af3 Add support for jumbo Ethernet frames on the DP83820. 2001-07-07 02:32:38 +00:00
thorpej 4f9dcdfb8a Split the receive interrupt handler into two versions, one for the
SiS900/DP83815, one for the DP83820.  In preparation for changes
to the DP83820 version for handling jumbo Ethernet frames.
2001-06-30 22:35:05 +00:00
simonb 1506d21315 Make error checking/reporting a little more correct. 2001-06-18 01:58:08 +00:00
thorpej 9988acd41e Don't need INET or NS includes here. 2001-06-12 22:28:15 +00:00
thorpej cc3002d53b Clarify a historical comment. 2001-06-03 03:55:10 +00:00
thorpej ca4d373730 Implement support for IP/TCP/UDP checksum offloading provided by
network interfaces.  This works by pre-computing the pseudo-header
checksum and caching it, delaying the actual checksum to ip_output()
if the hardware cannot perform the sum for us.  In-bound checksums
can either be fully-checked by hardware, or summed up for final
verification by software.  This method was modeled after how this
is done in FreeBSD, although the code is significantly different in
most places.

We don't delay checksums for IPv6/TCP, but we do take advantage of the
cached pseudo-header checksum.

Note: hardware-assisted checksumming defaults to "off".  It is
enabled with ifconfig(8).  See the manual page for details.

Implement hardware-assisted checksumming on the DP83820 Gigabit Ethernet,
3c90xB/3c90xC 10/100 Ethernet, and Alteon Tigon/Tigon2 Gigabit Ethernet.
2001-06-02 16:17:06 +00:00
thorpej f1f78293df - Add some instrumentation which can be enabled by defining
SIP_EVENT_COUNTERS.
- Decrease SIP_NTXSEGS to 8 and increase SIP_TXQUEUELEN to 256.
  This gives us 256 transmit jobs with only twice the descriptor
  memory footprint.  This prevents stalling transmissions due to
  lack of transmit jobs under heavy load.
- Increase SIP_NRXDESC to 128 so we don't run out of receive descriptors
  under extreme load.
- As recommended by the manual, leave one descriptor in the transmit ring
  with OWN clear to prevent wrap-around.
- Even though the manual claims that driver software must initialize
  TXDP if there are no pending transmissions when a new transmission
  is to be initialized, doing so causes serious performance degredation
  on the DP83820 under heavy load.  Not initializing TXDP also increases
  performance on the DP83815.

All of this gets us up to ~90Mb/s on both the DP83820 and DP83815 when
connected to a 100base network.
2001-05-18 04:38:30 +00:00
thorpej dbdf3820d8 Add a driver for the National Semiconductor DP83820 Gigabit Ethernet
chip.  This is found on the NetGear GA-622 and Asante FriendlyNet
GigaNIX.
2001-05-18 02:03:53 +00:00