since BTLB entries can be scarce and very little of an I/O subsystem normally
needs to be mapped.
Instead, the pmap now allows mappings of I/O space to be entered with
pmap_kenter_pa. bus_space mappings for small amounts of I/O space (as for
virtually all devices) are made this way, with BTLB entries still used for
large mappings for things like framebuffers.
This has led to more and cleaned-up uses of bus_space(9) and has caused
some autoconf cleanup. Also, kgdb is now attached and connected before
autoconfiguration, which is much earlier than before.
usync_cntl() system calls.
- when usync_cntl is used and the process is aborted (eg: by kill -9)
libc does not call usync_cntl() to unblock things. We have to cleanup
data allocated in the kernel. This is now done through the emulation
specific exit hook
- IRIX initialize some data in the system part of the PRDA: the pid and
a prid (PRDA ID?). We initialize both to pid.
- Move back struct irix_share_group from irix_exec.h to irix_prctl.h, it
is more revelant here.
- fix a few typos
perform the translation and recursion if t->ranges != NULL. Make
sbus, cpuunit, and bootbus inherit the parent's map/mmap routines,
and delete the now-unused mapping functions. Update all places where
bus space tags are statically allocated.
on current-users, with cross-check and some improvement from linux-2.4.19
and FreeBSD-current.
Also don't set the APO_UDMA_CLK66 bit for Ultra/100 capable chipset, and
support Ultra/133 for the VT8233A.
as they default to using install(1) -r.
the rm can cause problems in certain situations, such as moving a library or
shared linker that install(1) depends upon to another location and replacing
it with a (sym)link.
the 4M super-section that the PTP will map, not some random 1M
chunk of it. This gives the PTP hint code a much better chance
to working properly, and allows us to tidy up the code that
flushes a PTP from the cache in pmap_destroy().
to do uncached memory access during VM operations (which can be
quite expensive on some CPUs).
We currently write-back PTEs as soon as they're modified; there is
some room for optimization (to write them back in larger chunks).
For PTEs in the APTE space (i.e. PTEs for pmaps that describe another
process's address space), PTEs must also be evicted from the cache
complete (PTEs in PTE space will be evicted durint a context switch).
board has 2 CPU units (one for each processor), one of which also has
a "bootbus", to which the serial ports, etc. are attached.
We can now probe/attach CPUs on a SPARCserver 1000.
thorpej