man8/man8.i386/dosboot.8, and man8/man8.i386/pxeboot.8.
* In all:
- First few lines of each man page should be .Dd, .Os, .Dt, .Nm;
- Use Nx; new sentence, new line; serial comma;
- Update comments about which files to keep in sync.
* In MI boot(8):
- add reference to architecture-specific boot(8);
- add commented-out reference to boot.cfg(5);
- reinstate BUGS heading that was lost when the MI boot.8 was
created from i386 boot.8.
* In i386 boot.8:
- mention -x and -z flags;
- we can boot from media other than floppy, or from the network;
- remove first paragraph in BUGS section now that an MI boot(8)
man page exists.
* In i386 dosboot.8 and pxeboot.8:
- mention -c, -x, and -z flags.
cats was never able to dump a kernel core dump because reading from
VGA addresses (0xb8000) was causing the system to hang.
To workaround this reprogram the footbridge to map the memory to appear on
the PCI bus at 0x20000000, rather than at 0x0. Also configure the pci bus
to have a DMA range so that data is mapped correctly.
Note that -current kernels seem to hang when unmounting the fs. This
is a seperate issue, and appears to be because interrupts need to be
enabled to unmount filesystems.
So using reboot 0x104 does work, as it does a sync without unmounting the
filesystems.
Also arm savecore doesn't do anything with the memroy dump, as on arm we
currently just dump the raw memory, there's no header block to indicate
memory sizes or other useful information.
They do not seem well-justified according to anyone's understanding
of what they really do, and it seems especially inappropriate to
call them at attach- and resume-time.
get rid of SIP_DECL() and reduce #ifdef DP83820 code. Next step
is to move a bunch of shared code to a new file (if_sipcom.c, say)
and compile it *once*.
While I am here, add suspend/resume handling to sip(4) and to
gsip(4).
Tested with the NatSemi sip(4) on the Soekris net4521. I don't
have any gsip(4) to test with, and it seems that the few holders
of gsip(4) in the world keep them in their attic, anyway.
I don't know why we gpio(4) didn't do that before, but it seems
harmless.
Add naive power handling: when a gpio(4) instance is resumed, write
each pin's configuration flags and output state from the softc to
the hardware using gpiobus_pin_ctl() and gpiobus_pin_write().
While suspended, fail every ioctl() except for GPIOINFO with EBUSY.
separate powering up devices from restoring their state. This is required
on some machines where AcpiLeaveSleepState can fail due to an attempt to
access a powered off device.
82571 manual and Intel Application Note 450. Previously, we were setting
RADV and TIDV/TADV values that didn't make any sense given the enormous
ITR value we were setting (well outside the range recommended by Intel
and quite possibly rejected silently by the chip as junk) and setting
RADV without setting RDTR, which is explicitly documented as having no
effect.
A considerable performance improvement is achieved for TCP and UDP at
gigabit speed. I need to revisit this to deal with the timer ticks
being 4X as long when the chip's in 100mbit mode, and to set values
for the older chips' interrupt timers that are more like what the
appnote recommends. This should help for 82543 and newer, though.
yamt