nell hardware interrupt handler run at IPL_VM, we can call the socket
drivers interrupt handler directly.
This is always possible on sparc64, but on sparc we might have to fall
back to the old softint bounce. Since this uses arbitrary IPLs, we
can not use the new softint_* for this - we'll have to use the old
sparc_softintr_* functions.
XXX - need to move this (as well as the equivalent sparc stuff added
recently) outa here into sbus_machdep or something. We should not need
to know details of the actual bus_space implementation here.
bus_space_{read,write}_[1248]() functions, which will allow 16-bit
PCMCIA support to work without additional hacks in MI drivers.
this option is not enabled yet.
intterupts. No more races between the two interrupt handlers, without any
locking, and the driver becomes a bit simpler too.
Use the last bit of the config flags to select between the first and the
second sbus interrupt level the firmware has assigned to us.
- implement SIMPLEQ_REMOVE(head, elm, type, field). whilst it's O(n),
this mirrors the functionality of SLIST_REMOVE() (the other
singly-linked list type) and FreeBSD's STAILQ_REMOVE()
- remove the unnecessary elm arg from SIMPLEQ_REMOVE_HEAD().
this mirrors the functionality of SLIST_REMOVE_HEAD() (the other
singly-linked list type) and FreeBSD's STAILQ_REMOVE_HEAD()
- remove notes about SIMPLEQ not supporting arbitrary element removal
- use SIMPLEQ_FOREACH() instead of home-grown for loops
- use SIMPLEQ_EMPTY() appropriately
- use SIMPLEQ_*() instead of accessing sqh_first,sqh_last,sqe_next directly
- reorder manual page; be consistent about how the types are listed
- other minor cleanups
We may revisit this once a general interrupt queuing mechanism is
available and we can avoid calling the pcmcia cards interrupt handler at
an exsessive IPL.
Configure power supply on VPP1 at 5V when powering up a socket.
Get rid of stray interrupts.
Make the driver quiet for normal operation when not in debugging mode.
This makes ray0 at nell0 actually work when compiled with RAY_USE_AMEM=1.
chipset functions acordingly. Initialize timing registers (for now to
the slowest possible setting).
Add some debug output. XXX - clean this up.
This is not ready for prime time, but I can attach ray0 and wi0 now in my
LX.
