christos
ee8d32bb92
remove __HAVE_COMPAT_NETBSD32
2017-01-27 17:21:51 +00:00
christos
e4cf317682
provide __HAVE_COMPAT_NETBSD32 and fix multiple include protection consistently.
2017-01-26 15:55:08 +00:00
christos
0905c6150f
making this use mips assembly is a good start!
2017-01-13 19:10:14 +00:00
cherry
3b1622fa3c
"Make NetBSD great again!"
...
Introduce uvm_hotplug(9) to the kernel.
Many thanks, in no particular order to:
TNF, for funding the project.
Chuck Silvers - for multiple API reviews and feedback.
Nick Hudson - for testing on multiple architectures and bugfix patches.
Everyone who helped with boot testing.
KeK (http://www.kek.org.in ) for hosting the primary developers.
2016-12-23 07:15:27 +00:00
mrg
1fee883e7a
fix lp64 kvm access for many kernel addresses.
...
in mm_md_kernacc() allow an address if it matches MIPS_KSEG0_P().
now a static n64 kvm-using binary runs sanely on an n64 kernel.
(dynamic n64 has problems with non-trivial programs.)
ok matt@.
2016-12-22 07:56:38 +00:00
ozaki-r
dd8638eea5
Move bpf_mtap and if_ipackets++ on Rx of each driver to percpuq if_input
...
The benefits of the change are:
- We can reduce codes
- We can provide the same behavior between drivers
- Where/When if_ipackets is counted up
- Note that some drivers still update packet statistics in their own
way (periodical update)
- Moved bpf_mtap run in softint
- This makes it easy to MP-ify bpf
Proposed on tech-kern and tech-net
2016-12-15 09:28:02 +00:00
ozaki-r
c0e7885f20
Apply deferred if_start framework
...
if_schedule_deferred_start checks if the if_snd queue contains packets,
so drivers don't need to check it by themselves.
2016-12-08 01:12:00 +00:00
mrg
31f9789f00
fix non-DIAG builds.
2016-11-28 04:18:08 +00:00
skrll
233a0f2e96
1TB is enough UVA for anyone... plus not all cpus can support more.
2016-11-22 11:01:50 +00:00
skrll
99abbf6f20
Optimise the interrupt vector a litte. From matt@
2016-11-19 09:05:50 +00:00
skrll
1f089c9791
Sprinkle MFC0_HAZARD for previous and PARANOIA
2016-11-18 16:23:40 +00:00
macallan
1865df3d11
don't blindly zero STATUS in order to disable interrupts, instead take care
...
to preserve bits like KX in case we catch an interrupt between mtc0 and the
write actually taking effect
now n32 kernels on my O2 are (mostly) stable again
ok skrll@
2016-11-18 13:50:36 +00:00
maya
48097a1e57
switch post-mfc0 call "hazard barrier" from NOP_L to MFC0_HAZARD.
...
this means it will be applied if MIPS3 too, and now with the prior
commit, it will be a superscalar nop, not just a plain nop.
2016-11-11 16:49:30 +00:00
maya
8eed97ac9a
remove redundant NOP_L. we do not use the register immediately after
...
load, so it's not needed.
2016-11-11 16:45:14 +00:00
maya
5997445727
switch mfc0_hazard to be superscalar nop, some mips3 are superscalar
...
and need this to do the right thing
2016-11-11 16:41:32 +00:00
maya
9c53bef583
Move MFC0_HAZARD definition to asm.h instead of defining it twice
2016-11-09 11:50:09 +00:00
skrll
958325a389
Cmoment formatting. No functional change.
2016-11-04 08:24:36 +00:00
skrll
94b84ddb19
Pre-allocate some kcpuset_ts so that we don't try and allocate in the
...
wrong context.
2016-10-31 12:49:04 +00:00
skrll
7a18db2183
Fixup IPI interrupt delivery and splsched mask so that
...
sys/uvm/pmap/pmap_tlb.c
541 KASSERTMSG(ci->ci_cpl >= IPL_SCHED,
542 "%s: cpl (%d) < IPL_SCHED (%d)",
543 __func__, ci->ci_cpl, IPL_SCHED);
doesn't fire.
2016-10-31 12:27:22 +00:00
jdolecek
e1d3e1b041
add isa_intr_establish_xname() to MD isa headers so that it can be used
...
by MI drivers
2016-10-18 22:04:33 +00:00
maxv
f89daf891a
Remove unused (and buggy) function. Not even compile-tested, but I've
...
been told to go ahead anyway.
2016-10-16 10:57:58 +00:00
macallan
7c498bf2e4
include locore.h for MIPS3_PLUS, while there annotate some #else and #endif
2016-10-13 18:58:00 +00:00
macallan
e16937d805
include locore.h so MIPS3_PLUS is visible and we build support for MIPS-III
...
and newer FPUs as needed
no more SIGILLs on trunc.d.* with n32 userlands
2016-10-13 18:54:46 +00:00
macallan
e47f75e641
sprinkle #ifndef __ASSEMBLER__ to make this file usable from .S - mostly for
...
macros like MIPS3_PLUS
2016-10-13 18:52:30 +00:00
skrll
1b2f83c8ef
Trailing whitespace
2016-10-10 07:37:56 +00:00
skrll
79743a4d43
vaddr_t -> register_t in range cache ops
2016-10-10 07:37:17 +00:00
skrll
201a76373f
Sign extend VA for cache operations.
...
OK matt@
2016-10-08 08:19:22 +00:00
macallan
e73779d781
- don't clear KX when disabling interrupts
...
- sign extend addresses as needed
- use PAGE_SIZE instead of blindly assuming 4KB
now n32 kernels work again on my R5k SGIs
thanks to skrll@ for helping me with this
2016-10-08 00:39:53 +00:00
ryo
4613293a54
add support MT7628/MediaTek LinkIt Smart 7688
...
by @hiroshi and me.
2016-10-05 15:54:58 +00:00
ryo
d721e9d6a1
KNF; indent, spaces and tabs.
...
No functional change.
2016-10-05 15:39:31 +00:00
maya
4b2f24ad42
Simplify. LOONGSON2 and MIPSNNR2 not possible.
2016-10-02 09:06:35 +00:00
jdolecek
f52dcd49ca
remove last isolated islands using BUS_SPACE_BARRIER_SYNC and
...
BUS_SPACE_BARRIER_X_BEFORE_X - these were only ever defined for mips and ia64,
and never actually implemented even there
2016-09-15 21:45:37 +00:00
skrll
ad83f0c77c
Remove stray assignment.
2016-09-10 13:42:11 +00:00
skrll
c6d5e9154c
Fixup siginfo
2016-09-10 13:40:14 +00:00
skrll
328eb1ab0d
Flush the dcache before syncing the icache as previous mappings (UBC)
...
might have used the same colo(u)r and the dcache won't have been flush up
to now.
2016-09-05 06:59:25 +00:00
skrll
87240e32e1
Another typo... that's what you get for not compile testing
2016-09-04 15:25:11 +00:00
skrll
7246cf077c
Typo in previous
2016-09-04 15:23:14 +00:00
skrll
6a9bc54ee6
Safely remove non-PV_KENTER pages from pv_list
2016-09-04 15:21:54 +00:00
skrll
e149b2e619
Sign extend va for use with cache ops
2016-09-04 07:47:12 +00:00
skrll
9cd6c57a69
More debug
2016-09-04 07:38:45 +00:00
skrll
3b8780d834
Remove old and incorrect comments
2016-09-04 07:30:52 +00:00
skrll
16b46675c7
Fix pte_cached_p for MIPS_HAS_R4K_MMU
2016-09-04 07:27:49 +00:00
skrll
b37324e131
Comment consistency. No functional change.
2016-08-27 07:22:14 +00:00
skrll
81daccdc2c
Trailing whitespace
2016-08-27 05:52:43 +00:00
skrll
4e8b65a17b
Adjust evbmips_iointr to pass a clockframe pointer and use it for
...
pwmclock @ voyager.
Suggested by matt@
Hi macallan!
2016-08-26 15:45:47 +00:00
skrll
d2b6f0303e
Whitespcae
2016-08-23 07:29:46 +00:00
skrll
0363604388
KNF
2016-08-22 11:34:42 +00:00
skrll
4ca51ca61a
Can't KASSERT that a lock isn't held.
2016-08-22 11:34:06 +00:00
skrll
d12c93e8ec
Fix a couple of (unsed) definitions
2016-08-20 06:34:22 +00:00
skrll
441d694c73
Need to set ci_request_ipis otherwise they won't get delivered.
...
Correct the test for the IPL_HIGH ipis
2016-08-20 06:31:15 +00:00