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Adjust evbmips_iointr to pass a clockframe pointer and use it for 

pwmclock @ voyager.

Suggested by matt@

Hi macallan!
This commit is contained in:
skrll 2016-08-26 15:45:47 +00:00
parent 6cb75cb515
commit 4e8b65a17b
15 changed files with 71 additions and 67 deletions
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8
sys/arch/algor/algor/algor_intr.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: algor_intr.c,v 1.1 2011/07/09 16:03:00 matt Exp $ */
/* $NetBSD: algor_intr.c,v 1.2 2016/08/26 15:45:47 skrll Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: algor_intr.c,v 1.1 2011/07/09 16:03:00 matt Exp $");
__KERNEL_RCSID(0, "$NetBSD: algor_intr.c,v 1.2 2016/08/26 15:45:47 skrll Exp $");
#define __INTR_PRIVATE
#include "opt_algor_p4032.h"
@ -102,9 +102,9 @@ intr_init(void)
#ifdef evbmips
void
evbmips_iointr(int ipl, vaddr_t pc, uint32_t pending)
evbmips_iointr(int ipl, uint32_t pending, struct clockframe *cf)
{
(*algor_iointr)(ipl, pc, pending);
(*algor_iointr)(ipl, cf->pc, pending);
}
void *

8
sys/arch/evbmips/alchemy/mach_intr.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: mach_intr.c,v 1.6 2011/07/10 00:03:52 matt Exp $ */
/* $NetBSD: mach_intr.c,v 1.7 2016/08/26 15:45:47 skrll Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@ -38,7 +38,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: mach_intr.c,v 1.6 2011/07/10 00:03:52 matt Exp $");
__KERNEL_RCSID(0, "$NetBSD: mach_intr.c,v 1.7 2016/08/26 15:45:47 skrll Exp $");
#include "opt_ddb.h"
@ -61,8 +61,8 @@ evbmips_intr_init(void)
}
void
evbmips_iointr(int ipl, uint32_t pc, uint32_t ipending)
evbmips_iointr(int ipl, uint32_t ipending, struct clockframe *cf)
{
au_iointr(ipl, pc, ipending);
au_iointr(ipl, cf->pc, ipending);
}

8
sys/arch/evbmips/atheros/mach_intr.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: mach_intr.c,v 1.6 2011/07/10 00:03:53 matt Exp $ */
/* $NetBSD: mach_intr.c,v 1.7 2016/08/26 15:45:47 skrll Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@ -34,7 +34,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: mach_intr.c,v 1.6 2011/07/10 00:03:53 matt Exp $");
__KERNEL_RCSID(0, "$NetBSD: mach_intr.c,v 1.7 2016/08/26 15:45:47 skrll Exp $");
#include "opt_ddb.h"
@ -55,8 +55,8 @@ evbmips_intr_init(void)
}
void
evbmips_iointr(int ipl, vaddr_t pc, uint32_t ipending)
evbmips_iointr(int ipl, uint32_t ipending, struct clockframe *cf)
{
(*platformsw->apsw_intrsw->aisw_iointr)(ipl, pc, ipending);
(*platformsw->apsw_intrsw->aisw_iointr)(ipl, cf->pc, ipending);
}

8
sys/arch/evbmips/cavium/mach_intr.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: mach_intr.c,v 1.2 2015/06/01 22:55:12 matt Exp $ */
/* $NetBSD: mach_intr.c,v 1.3 2016/08/26 15:45:47 skrll Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@ -38,7 +38,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: mach_intr.c,v 1.2 2015/06/01 22:55:12 matt Exp $");
__KERNEL_RCSID(0, "$NetBSD: mach_intr.c,v 1.3 2016/08/26 15:45:47 skrll Exp $");
#include "opt_ddb.h"
@ -61,8 +61,8 @@ evbmips_intr_init(void)
}
void
evbmips_iointr(int ipl, vaddr_t pc, uint32_t ipending)
evbmips_iointr(int ipl, uint32_t ipending, struct clockframe *cf)
{
octeon_iointr(ipl, pc, ipending);
octeon_iointr(ipl, cf->pc, ipending);
}

16
sys/arch/evbmips/evbmips/interrupt.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: interrupt.c,v 1.23 2016/08/26 07:07:29 skrll Exp $ */
/* $NetBSD: interrupt.c,v 1.24 2016/08/26 15:45:47 skrll Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.23 2016/08/26 07:07:29 skrll Exp $");
__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.24 2016/08/26 15:45:47 skrll Exp $");
#include <sys/param.h>
#include <sys/cpu.h>
@ -72,14 +72,14 @@ cpu_intr(int ppl, vaddr_t pc, uint32_t status)
"%s: cpl (%d) != ipl (%d)", __func__, ci->ci_cpl, ipl);
KASSERT(pending != 0);
struct clockframe cf = {
.pc = pc,
.sr = status,
.intr = (ci->ci_idepth > 1)
};
#ifdef MIPS3_ENABLE_CLOCK_INTR
if (pending & MIPS_INT_MASK_5) {
struct clockframe cf;
cf.pc = pc;
cf.sr = status;
cf.intr = (ci->ci_idepth > 1);
KASSERTMSG(ipl == IPL_SCHED,
"%s: ipl (%d) != IPL_SCHED (%d)",
@ -92,7 +92,7 @@ cpu_intr(int ppl, vaddr_t pc, uint32_t status)
if (pending != 0) {
/* Process I/O and error interrupts. */
evbmips_iointr(ipl, pc, pending);
evbmips_iointr(ipl, pending, &cf);
}
KASSERT(biglock_count == ci->ci_biglock_count);
KASSERT(blcnt == curlwp->l_blcnt);

6
sys/arch/evbmips/gdium/gdium_intr.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: gdium_intr.c,v 1.7 2014/03/29 19:28:28 christos Exp $ */
/* $NetBSD: gdium_intr.c,v 1.8 2016/08/26 15:45:47 skrll Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@ -37,7 +37,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: gdium_intr.c,v 1.7 2014/03/29 19:28:28 christos Exp $");
__KERNEL_RCSID(0, "$NetBSD: gdium_intr.c,v 1.8 2016/08/26 15:45:47 skrll Exp $");
#define __INTR_PRIVATE
@ -297,7 +297,7 @@ evbmips_intr_disestablish(void *cookie)
}
void
evbmips_iointr(int ipl, vaddr_t pc, uint32_t ipending)
evbmips_iointr(int ipl, uint32_t ipending, struct clockframe *cf)
{
struct evbmips_intrhand *ih;
int level;

6
sys/arch/evbmips/include/intr.h
View File

@ -1,4 +1,4 @@
/* $NetBSD: intr.h,v 1.19 2011/07/09 16:03:01 matt Exp $ */
/* $NetBSD: intr.h,v 1.20 2016/08/26 15:45:47 skrll Exp $ */
/*-
* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
@ -46,9 +46,11 @@ struct evbmips_intrhand {
int ih_ipl;
};
struct clockframe;
void intr_init(void);
void evbmips_intr_init(void);
void evbmips_iointr(int, vaddr_t, uint32_t);
void evbmips_iointr(int, uint32_t, struct clockframe *);
void *evbmips_intr_establish(int, int (*)(void *), void *);
void evbmips_intr_disestablish(void *);

11
sys/arch/evbmips/ingenic/clock.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: clock.c,v 1.7 2016/01/29 01:54:14 macallan Exp $ */
/* $NetBSD: clock.c,v 1.8 2016/08/26 15:45:48 skrll Exp $ */
/*-
* Copyright (c) 2014 Michael Lorenz
@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.7 2016/01/29 01:54:14 macallan Exp $");
__KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.8 2016/08/26 15:45:48 skrll Exp $");
#include "opt_multiprocessor.h"
@ -44,7 +44,7 @@ __KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.7 2016/01/29 01:54:14 macallan Exp $");
extern void ingenic_puts(const char *);
void ingenic_clockintr(uint32_t);
void ingenic_clockintr(struct clockframe *);
static u_int
ingenic_count_read(struct timecounter *tc)
@ -191,9 +191,8 @@ int cnt = 99;
#endif
void
ingenic_clockintr(uint32_t id)
ingenic_clockintr(struct clockframe *cf)
{
extern struct clockframe cf;
int s = splsched();
struct cpu_info * const ci = curcpu();
#ifdef USE_OST
@ -239,6 +238,6 @@ ingenic_clockintr(uint32_t id)
*/
MTC0(1 << IPI_CLOCK, 20, 1);
#endif
hardclock(&cf);
hardclock(cf);
splx(s);
}

15
sys/arch/evbmips/ingenic/intr.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: intr.c,v 1.10 2016/01/29 01:54:14 macallan Exp $ */
/* $NetBSD: intr.c,v 1.11 2016/08/26 15:45:48 skrll Exp $ */
/*-
* Copyright (c) 2014 Michael Lorenz
@ -27,7 +27,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.10 2016/01/29 01:54:14 macallan Exp $");
__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.11 2016/08/26 15:45:48 skrll Exp $");
#define __INTR_PRIVATE
@ -54,9 +54,8 @@ __KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.10 2016/01/29 01:54:14 macallan Exp $");
#define DPRINTF while (0) printf
#endif
extern void ingenic_clockintr(uint32_t);
extern void ingenic_clockintr(struct clockframe *);
extern void ingenic_puts(const char *);
extern struct clockframe cf;
/*
* This is a mask of bits to clear in the SR when we go to a
* given hardware interrupt priority level.
@ -139,7 +138,7 @@ evbmips_intr_init(void)
}
void
evbmips_iointr(int ipl, vaddr_t pc, uint32_t ipending)
evbmips_iointr(int ipl, uint32_t ipending, struct clockframe *cf)
{
uint32_t id;
#ifdef INGENIC_INTR_DEBUG
@ -192,7 +191,7 @@ evbmips_iointr(int ipl, vaddr_t pc, uint32_t ipending)
tag = MFC0(CP0_CORE_MBOX, 1);
ingenic_puts("1");
if (tag & 0x400)
hardclock(&cf);
hardclock(cf);
//ipi_process(curcpu(), tag);
#ifdef INGENIC_INTR_DEBUG
snprintf(buffer, 256,
@ -209,7 +208,7 @@ evbmips_iointr(int ipl, vaddr_t pc, uint32_t ipending)
}
if (ipending & MIPS_INT_MASK_2) {
/* this is a timer interrupt */
ingenic_clockintr(id);
ingenic_clockintr(cf);
clockintrs.ev_count++;
ingenic_puts("INT2\n");
}
@ -230,7 +229,7 @@ evbmips_iointr(int ipl, vaddr_t pc, uint32_t ipending)
mask = readreg(JZ_ICPR0);
if (mask & 0x0c000000) {
writereg(JZ_ICMSR0, 0x0c000000);
ingenic_clockintr(id);
ingenic_clockintr(cf);
writereg(JZ_ICMCR0, 0x0c000000);
clockintrs.ev_count++;
}

13
sys/arch/evbmips/loongson/loongson_intr.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: loongson_intr.c,v 1.4 2014/03/29 19:28:28 christos Exp $ */
/* $NetBSD: loongson_intr.c,v 1.5 2016/08/26 15:45:48 skrll Exp $ */
/*-
* Copyright (c) 2001 The NetBSD Foundation, Inc.
@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: loongson_intr.c,v 1.4 2014/03/29 19:28:28 christos Exp $");
__KERNEL_RCSID(0, "$NetBSD: loongson_intr.c,v 1.5 2016/08/26 15:45:48 skrll Exp $");
#define __INTR_PRIVATE
@ -136,7 +136,7 @@ evbmips_intr_init(void)
}
void
evbmips_iointr(int ppl, vaddr_t pc, uint32_t ipending)
evbmips_iointr(int ppl, uint32_t ipending, struct clockframe *cf)
{
struct evbmips_intrhand *ih;
int irq;
@ -162,14 +162,17 @@ evbmips_iointr(int ppl, vaddr_t pc, uint32_t ipending)
bonito_intrhead[irq].intr_count.ev_count++;
LIST_FOREACH (ih,
&bonito_intrhead[irq].intrhand_head, ih_q) {
(*ih->ih_func)(ih->ih_arg);
if (ih->ih_arg)
(*ih->ih_func)(ih->ih_arg);
else
(*ih->ih_func)(cf);
}
}
REGVAL(BONITO_INTENSET) = isr;
(void)REGVAL(BONITO_INTENSET);
}
if (isr0 & LOONGSON_INTRMASK_INT0)
sys_platform->isa_intr(ppl, pc, ipending);
sys_platform->isa_intr(ppl, cf->pc, ipending);
}
void *

6
sys/arch/evbmips/malta/malta_intr.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: malta_intr.c,v 1.24 2014/03/31 20:44:19 christos Exp $ */
/* $NetBSD: malta_intr.c,v 1.25 2016/08/26 15:45:48 skrll Exp $ */
/*
* Copyright 2001, 2002 Wasabi Systems, Inc.
@ -40,7 +40,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: malta_intr.c,v 1.24 2014/03/31 20:44:19 christos Exp $");
__KERNEL_RCSID(0, "$NetBSD: malta_intr.c,v 1.25 2016/08/26 15:45:48 skrll Exp $");
#define __INTR_PRIVATE
@ -248,7 +248,7 @@ evbmips_intr_disestablish(void *arg)
}
void
evbmips_iointr(int ipl, vaddr_t pc, uint32_t ipending)
evbmips_iointr(int ipl, uint32_t ipending, struct clockframe *cf)
{
/* Check for error interrupts (SMI, GT64120) */

6
sys/arch/mips/adm5120/adm5120_intr.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: adm5120_intr.c,v 1.6 2011/07/10 23:13:23 matt Exp $ */
/* $NetBSD: adm5120_intr.c,v 1.7 2016/08/26 15:45:48 skrll Exp $ */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@ -67,7 +67,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: adm5120_intr.c,v 1.6 2011/07/10 23:13:23 matt Exp $");
__KERNEL_RCSID(0, "$NetBSD: adm5120_intr.c,v 1.7 2016/08/26 15:45:48 skrll Exp $");
#include "opt_ddb.h"
#define __INTR_PRIVATE
@ -265,7 +265,7 @@ adm5120_intr_disestablish(void *cookie)
free(ih, M_DEVBUF);
}
void
evbmips_iointr(int ipl, uint32_t pc, uint32_t ipending)
evbmips_iointr(int ipl, uint32_t ipending, struct clockframe *cf)
{
struct evbmips_intrhand *ih;
uint32_t irqmask, irqstat;

6
sys/arch/mips/ralink/ralink_intr.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: ralink_intr.c,v 1.3 2011/09/27 01:02:34 jym Exp $ */
/* $NetBSD: ralink_intr.c,v 1.4 2016/08/26 15:45:48 skrll Exp $ */
/*-
* Copyright (c) 2011 CradlePoint Technology, Inc.
* All rights reserved.
@ -29,7 +29,7 @@
#define __INTR_PRIVATE
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: ralink_intr.c,v 1.3 2011/09/27 01:02:34 jym Exp $");
__KERNEL_RCSID(0, "$NetBSD: ralink_intr.c,v 1.4 2016/08/26 15:45:48 skrll Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@ -291,7 +291,7 @@ ra_pic_intr(void *arg)
* in the generic MIPS code for the timer
*/
void
evbmips_iointr(int ipl, vaddr_t pc, uint32_t ipending)
evbmips_iointr(int ipl, uint32_t ipending, struct clockframe *cf)
{
while (ipending != 0) {
const u_int bitno = 31 - __builtin_clz(ipending);

8
sys/arch/mips/rmi/rmixl_intr.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: rmixl_intr.c,v 1.11 2016/08/01 18:09:50 dholland Exp $ */
/* $NetBSD: rmixl_intr.c,v 1.12 2016/08/26 15:45:48 skrll Exp $ */
/*-
* Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko.
@ -64,7 +64,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: rmixl_intr.c,v 1.11 2016/08/01 18:09:50 dholland Exp $");
__KERNEL_RCSID(0, "$NetBSD: rmixl_intr.c,v 1.12 2016/08/26 15:45:48 skrll Exp $");
#include "opt_ddb.h"
#include "opt_multiprocessor.h"
@ -865,12 +865,12 @@ rmixl_intr_disestablish(void *cookie)
}
void
evbmips_iointr(int ipl, vaddr_t pc, uint32_t pending)
evbmips_iointr(int ipl, uint32_t pending, struct clockframe *cf)
{
struct rmixl_cpu_softc *sc = (void *)curcpu()->ci_softc;
DPRINTF(("%s: cpu%u: ipl %d, pc %#"PRIxVADDR", pending %#x\n",
__func__, cpu_number(), ipl, pc, pending));
__func__, cpu_number(), ipl, cf->pc, pending));
/*
* 'pending' arg is a summary that there is something to do

13
sys/dev/pci/voyager/pwmclock.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: pwmclock.c,v 1.10 2013/05/14 09:19:36 macallan Exp $ */
/* $NetBSD: pwmclock.c,v 1.11 2016/08/26 15:45:48 skrll Exp $ */
/*
* Copyright (c) 2011 Michael Lorenz
@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: pwmclock.c,v 1.10 2013/05/14 09:19:36 macallan Exp $");
__KERNEL_RCSID(0, "$NetBSD: pwmclock.c,v 1.11 2016/08/26 15:45:48 skrll Exp $");
#include <sys/param.h>
#include <sys/systm.h>
@ -77,7 +77,6 @@ static u_int get_pwmclock_timecount(struct timecounter *);
struct pwmclock_softc *pwmclock;
extern void (*initclocks_ptr)(void);
extern struct clockframe cf;
/* 0, 1/4, 3/8, 1/2, 5/8, 3/4, 7/8, 1 */
static int scale_m[] = {1, 1, 3, 1, 5, 3, 7, 1};
@ -137,7 +136,8 @@ pwmclock_attach(device_t parent, device_t self, void *aux)
aprint_normal("\n");
voyager_establish_intr(parent, 22, pwmclock_intr, sc);
/* NULL here gets us the clockframe */
voyager_establish_intr(parent, 22, pwmclock_intr, NULL);
reg = voyager_set_pwm(100, 100); /* 100Hz, 10% duty cycle */
reg |= SM502_PWM_ENABLE | SM502_PWM_ENABLE_INTR |
SM502_PWM_INTR_PENDING;
@ -273,7 +273,8 @@ pwmclock_set_speed(struct pwmclock_softc *sc, int speed)
int
pwmclock_intr(void *cookie)
{
struct pwmclock_softc *sc = cookie;
struct clockframe *cf = cookie;
struct pwmclock_softc *sc = pwmclock;
uint32_t reg, now, diff;
/* is it us? */
@ -307,7 +308,7 @@ pwmclock_intr(void *cookie)
sc->sc_step = sc->sc_step_wanted;
}
hardclock(&cf);
hardclock(cf);
return 1;
}