header file. This should allow MI drivers to use the podloader functions,
though obviously they'll have to be able to cope if podulebus_initloader()
fails.
function pointers. It now contains two base addresses, one for 8-bit
transfers and one for 16-bit transfers. This should make it possible for me
to handle the Castle EtherSCSI card, which uses and address line to select
transfer width to the i82595.
each vm_page structure. Add a VM_MDPAGE_INIT() macro to init this
data when pages are initialized by UVM. These macros are mandatory,
but ports may #define them to nothing if they are not needed/used.
This deprecates struct pmap_physseg. As a transitional measure,
allow a port to #define PMAP_PHYSSEG so that it can continue to
use it until its pmap is converted to use VM_MDPAGE_MEMBERS.
Use all this stuff to eliminate a lot of extra work in the Alpha
pmap module (it's smaller and faster now). Changes to other pmap
modules will follow.
address shift (stride). This is necessary because many podules have standard
chips with odd address-bus wiring to allow for using LDM for
bus_space_*_multi_*().
<dev/podulebus/podulebus.h> is the canonical file to include, and includes
<machine/podulebus_machdep.h>.
<arch/${MACHINE}/poudulebus/podulebus.h> remains for backward compatibility.
is derived mostly from the arm32 version, but with a check for an obscure ARM2
bug thrown in.
arm26 fpu and cpu drivers use the new interface for catching undefined
instructions.
The architecture here follows that of the vax port -- each device has its
evcnt in its softc, but defers actually incrementing it to the IRQ
dispatcher. This way, devices can attach sub-counts (e.g. Rx and Tx counts
for Ethernet interfaces), but don't all have to have code to increment the
counters.
Drivers deliberately call evcnt_attach_dynamic() before establishing their
interrupt handler so that the establish routine can attach a parent event if
that's appropriate. At present, it isn't.
shape as the old arm32 one, but there are a few #defines to keep arm26 code
happy. Anything that depends on the precise shape of the trapframe,
and especially on being able to treat it as an array of registers, has been
updated.
Yes, this causes binary incompatibility. Yes, it's Evil, Bad and Wrong.
Nonetheless, I think it's probably the least unpleasant way to get close to
binary compatibility with NetBSD/arm32, and a very much doubt there are any
arm26 binaries out there that depend on the old shape of struct sigcontext.
and place the definition in <machine/types.h>. This can now be used
as a flag to indicate whether or not <machine/intr.h> can be included
to get the generic soft interrupt API.
bjh21