Commit Graph

597 Commits

Author SHA1 Message Date
ad
63811f5275 Generic soft interrupts are mandatory. 2007-07-14 21:48:17 +00:00
kiyohara
05e3df98c5 Add nfsmb(4). 2007-07-11 08:01:50 +00:00
xtraeme
44af43c54b Add wpi(4). 2007-07-10 11:23:21 +00:00
pooka
0bc323f5cd Initialize the link context in a signal frame to the receiving lwp's
link context instead of NULL.  Otherwise, if we got a signal while the
lwp had a link context set, the link context would be set to NULL upon
return from signal delivery.

christos@tech-kern: "I think you are right."
2007-07-08 10:19:21 +00:00
tsutsui
69dbd2e45e Move x86 common cpu_counter functions into <x86/cpu_counter.h>. 2007-07-07 17:38:26 +00:00
tsutsui
6a8a584d1a Remove leftover netns stuff. 2007-07-07 05:13:14 +00:00
briggs
fd02762f07 Add (commented-out) support for IPMI on amd64--pretty much copied straight
from i386.
2007-07-03 23:05:26 +00:00
dsl
a87d1d52f9 Correct the disassembly of instructions that move immediate values into
64bit targets. Only the 0xb8-0xbf instructions (move immediate to register)
have a 64bit immediate constant.
Correct the disassembly of movq %eax to/from an immediate address - 64bit addr.
Add cmovxx instructions.
Now stands a chance of not getting all misaligned on normal C code.
Add a few others, but there are a lot missing, but probably mainly SIMD ones.
2007-06-22 20:54:59 +00:00
ad
bd348e7971 -options I2OVERBOSE. 2007-06-16 12:35:54 +00:00
njoly
7acff01093 Only print cpu features3 for Intel processors.
ok by xtraeme.
2007-06-14 12:28:51 +00:00
kiyohara
8f6cd34a62 Add zyd(4). 2007-06-09 11:34:01 +00:00
njoly
abfea2f7ae Remove duplicated AMD K8 MSR definitions, already in x86 specialreg.h
file.

ok by xtraeme.
2007-06-06 20:40:11 +00:00
xtraeme
abb9640a6e Ansify, de-__P(). 2007-06-04 23:24:14 +00:00
xtraeme
cb24dd04a8 Ansify, de-__P(), unregister. 2007-06-04 23:15:00 +00:00
xtraeme
4b7555434a - Use aprint_verbose for consistency with i386 (suggested by ad).
- Wrap long lines.
2007-06-04 14:45:32 +00:00
xtraeme
1744412928 Print Intel CPUID extended features if they are available, also
simplify ci_feature2_flags and use directly CPUID2_FLAGS on
bitmask_snprintf(9).

Now I can see the same CPUID features than on i386:

$ dmesg|grep -E '(cpu0.*features)'
cpu0: features: bffbfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
cpu0: features: bffbfbff<PGE,MCA,CMOV,PAT,PSE36,CFLUSH,B20,DS,ACPI,MMX>
cpu0: features: bffbfbff<FXSR,SSE,SSE2,SS,HTT,TM,SBF>
cpu0: features2: 649d<SSE3,MONITOR,DS-CPL,EST,CID,xTPR>
cpu0: features3: bffbfbff<SYSCALL/SYSRET,XD,EM64T>
$

Ok'ed by Andrew Doran.
2007-06-04 14:34:37 +00:00
martin
c2534a819b Add pseudo-device agr to all GENERIC kernels where it might make sense
(commented out in some).
2007-06-04 08:55:18 +00:00
xtraeme
53e2712d54 Add the options for Enhanced Speedstep commented out. 2007-06-03 19:34:07 +00:00
xtraeme
699c85af09 Make the Enhanced Speedstep driver available for i386 and amd64.
To use it on EM64T CPUs supporting the EST CPUID feature. Note that
some CPUs still don't work with this driver, like Xeon or Pentium 4.

Move the p[34]_get_bus_clock functions into its own file,
intel_busclock.c and remove this code from i386/identcpu.c.

Tested on i386 by myself and amd64 by Tonerre.
2007-06-03 19:32:26 +00:00
njoly
df2c7d05e6 Revert fs/gs changes for now.
This make clone(2) work again under NPTL compat linux emulation.

ok by fvdl.
2007-06-02 22:59:03 +00:00
blymn
3099e9ed7a Added smsc device. 2007-06-01 14:14:16 +00:00
christos
3ce718d4da Add compat 4.0 2007-05-29 23:21:52 +00:00
briggs
98fa060bce Enable aac(4) and ld at aac. 2007-05-26 03:02:02 +00:00
yamt
8e69ce0726 dumpsys: build a fake switchframe for postmortem debugging.
reviewed by Frank van der Linden.
2007-05-25 15:09:50 +00:00
xtraeme
f8dd8c3128 Do not print twice features2. This was added with yamt-idlelwp. 2007-05-22 13:56:54 +00:00
skrll
c7c42ec961 Correct comment - it's cpu_switchto now. 2007-05-21 08:17:41 +00:00
fvdl
816da6f7fe Revert fs/gs changes until I figure out issues with them. 2007-05-21 08:10:38 +00:00
fvdl
cbfa99c95a cpu_switchto: PCB_CR0(%r14) is a 32bit value, so don't use movq to retrieve it.
Using movq would copy pcb_flags along as well, which would cause traps
because bad bits would be written into %cr0 a few instructions later.
This wouldn't happen for native NetBSD processes (no pcb_flags set), but
it would happen for Linux processes.
2007-05-19 20:20:47 +00:00
yamt
f03010953f merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:

	idle lwp, and some changes depending on it.

	1. separate context switching and thread scheduling.
	   (cf. gmcgarry_ctxsw)
	2. implement idle lwp.
	3. clean up related MD/MI interfaces.
	4. make scheduler(s) modular.
2007-05-17 14:51:11 +00:00
fvdl
961ad7addf Fix broken constraint in asm. 2007-05-17 10:42:42 +00:00
bouyer
95b42c31ad add jmide(4), a driver for the JMicron Technology JMB36x PCIe to SATA II/PATA
controllers. These controllers can be found on add-on PCIe cards, or
on some motherboards to provide the PATA connectivity (e.g. some intel
ICH8-based motherboards).

Thanks to JMicron Technology for providing me documentation and
different sample boards for this work.
2007-05-15 17:53:41 +00:00
fvdl
cfcd9426ff Initialize a few PCB fields explicity in more places. 2007-05-13 20:48:23 +00:00
christos
cb03f90c19 convert to a very simple kern.ldscript 2007-05-12 20:59:19 +00:00
fvdl
3f7e9a7e0d Don't save/restore %fs and %gs in trapframe. The kernel won't touch them.
Instead, save/restore them on context switch. For 32bit processes, save/restore
the selector values only, for 64bit processes, save/restore the appropriate
MSRs. Iff the defaults have been changed.
2007-05-11 14:01:46 +00:00
xtraeme
36e4309910 Add "ug* at acpi?" following the current scheme in the files. 2007-05-08 16:55:54 +00:00
jnemeth
3377bd5221 PR/36234 - Joerg Niendorf -- xi -> xirc 2007-05-07 09:02:05 +00:00
xtraeme
0f4f0899c9 Enable rum(4). 2007-05-07 07:42:21 +00:00
bouyer
982bad256f Add bio(4) and associated bioctl(8) from OpenBSD, a driver control block
device controllers, and more specifically raid controllers.
Add a new sensor type, ENVSYS_DRIVE, to report drive status. From OpenBSD.
Add bio and sysmon support to mfi(4). This allow userland to query
status for drives and logical volumes attached to a mfi(4) controller. While
there fix some debug printfs in mfi so they compile.
Add bio(4) to amd64 and i386 GENERIC.
2007-05-01 17:18:52 +00:00
njoly
e703aa9569 Save the translated error value from Native to Linux, used by tracing
functions.

Reviewed by manu.
2007-04-26 12:54:17 +00:00
dyoung
c89841d199 Add ATADEBUG so that a person can patch atadebug without having to
recompile the kernel.
2007-04-23 04:55:07 +00:00
ad
8aefa8aa0c Share the sysarch stuff between the x86 ports. PR kern/36046. 2007-04-16 19:12:17 +00:00
njoly
052dae8c13 Add PT_MACHDEP_STRINGS, for kdump output. 2007-04-16 12:22:26 +00:00
macallan
d4ddadbf9d include files.wsfb 2007-04-10 02:19:03 +00:00
njoly
6beba6f9d8 s/linux/linux32/ in warning messages. 2007-03-22 12:08:51 +00:00
xtraeme
6ae05af027 - Remove ci_msr_rvalue, it's not useful anymore as yamt@ pointed out.
- Remove completely debug from msr_ipifuncs, now it's known to work.
2007-03-21 18:20:59 +00:00
xtraeme
bfde31a42f Remove the MSR read IPI handler, there won't be any driver that will
use it, and we can see if the values are ok in the CPUs in the write
operation.

Suggested by YAMAMOTO Takashi.
2007-03-21 06:36:42 +00:00
xtraeme
d59b97695d Erm, remove a local change committed accidentally in previous. 2007-03-20 21:30:27 +00:00
xtraeme
739956e2de ALL: Enable INTEL_ONDEMAND_CLOCKMOD.
GENERIC: Add INTEL_ONDEMAND_CLOCKMOD disabled by default.
2007-03-20 21:29:28 +00:00
xtraeme
28050fc1b5 Driver for Intel Thermal Monitor (feature TM) On-Demand Clock
Modulation.

This works by changing the duty cycle of the clock modulation,
and saves power and helps to not increase the temperature by
software.

Adapted from OpenBSD/FreeBSD's p4tcc.

To enable it one must use "options INTEL_ONDEMAND_CLOCKMOD".

Tested by me in UP and SMP, ok'ed by Matthew R. Green.
2007-03-20 21:22:03 +00:00
xtraeme
32b7185652 MSR read and write IPI handlers for x86. A MSR will be read or written
in all CPUs available in the system. This adds another member
to struct cpu_info, ci_msr_rvalue; it will contain the value of the MSR
in a previous operation.

Tested with clockmod in UP and SMP by me, tested with est in SMP
by Daniel Carosone and Michael Van Elst.

Ok'ed by Andrew Doran and Matthew R. Green.
2007-03-20 21:07:38 +00:00