MSR read and write IPI handlers for x86. A MSR will be read or written
in all CPUs available in the system. This adds another member to struct cpu_info, ci_msr_rvalue; it will contain the value of the MSR in a previous operation. Tested with clockmod in UP and SMP by me, tested with est in SMP by Daniel Carosone and Michael Van Elst. Ok'ed by Andrew Doran and Matthew R. Green.
This commit is contained in:
xtraeme
parent
ac2ed142c1
commit
32b7185652
@ -1,4 +1,4 @@
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/* $NetBSD: ipifuncs.c,v 1.7 2007/02/09 21:55:01 ad Exp $ */
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/* $NetBSD: ipifuncs.c,v 1.8 2007/03/20 21:07:39 xtraeme Exp $ */
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/*-
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* Copyright (c) 2000 The NetBSD Foundation, Inc.
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@ -40,7 +40,7 @@
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.7 2007/02/09 21:55:01 ad Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.8 2007/03/20 21:07:39 xtraeme Exp $");
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/*
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* Interprocessor interrupt handlers.
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@ -65,6 +65,8 @@ __KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.7 2007/02/09 21:55:01 ad Exp $");
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#include <machine/gdt.h>
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#include <machine/fpu.h>
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#include <x86/cpu_msr.h>
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#include <ddb/db_output.h>
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void x86_64_ipi_halt(struct cpu_info *);
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@ -87,6 +89,8 @@ void (*ipifunc[X86_NIPI])(struct cpu_info *) =
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pmap_do_tlb_shootdown,
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x86_64_reload_mtrr,
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gdt_reload_cpu,
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msr_read_ipi,
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msr_write_ipi
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};
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void
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@ -1,4 +1,4 @@
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/* $NetBSD: machdep.c,v 1.52 2007/03/04 14:36:11 yamt Exp $ */
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/* $NetBSD: machdep.c,v 1.53 2007/03/20 21:07:39 xtraeme Exp $ */
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/*-
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* Copyright (c) 1996, 1997, 1998, 2000, 2006, 2007
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@ -73,7 +73,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.52 2007/03/04 14:36:11 yamt Exp $");
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__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.53 2007/03/20 21:07:39 xtraeme Exp $");
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#include "opt_user_ldt.h"
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#include "opt_ddb.h"
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@ -135,6 +135,7 @@ __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.52 2007/03/04 14:36:11 yamt Exp $");
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#include <machine/fpu.h>
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#include <machine/mtrr.h>
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#include <machine/mpbiosvar.h>
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#include <x86/cpu_msr.h>
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#include <x86/x86/tsc.h>
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#include <dev/isa/isareg.h>
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@ -1527,6 +1528,8 @@ init_x86_64(paddr_t first_avail)
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splraise(IPL_IPI);
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enable_intr();
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x86_init();
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/* Make sure maxproc is sane */
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if (maxproc > cpu_maxproc())
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maxproc = cpu_maxproc();
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.h,v 1.19 2007/03/16 18:52:03 xtraeme Exp $ */
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/* $NetBSD: cpu.h,v 1.20 2007/03/20 21:07:40 xtraeme Exp $ */
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/*-
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* Copyright (c) 1990 The Regents of the University of California.
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@ -106,6 +106,8 @@ struct cpu_info {
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u_int32_t ci_signature;
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u_int64_t ci_tsc_freq;
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uint64_t ci_msr_rvalue; /* per-cpu msr returned value */
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const struct cpu_functions *ci_func;
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void (*cpu_setup)(struct cpu_info *);
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void (*ci_info)(struct cpu_info *);
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@ -1,4 +1,4 @@
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/* $NetBSD: ipifuncs.c,v 1.14 2007/02/09 21:55:04 ad Exp $ */
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/* $NetBSD: ipifuncs.c,v 1.15 2007/03/20 21:07:39 xtraeme Exp $ */
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/*-
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* Copyright (c) 2000 The NetBSD Foundation, Inc.
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@ -44,7 +44,7 @@
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*/
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.14 2007/02/09 21:55:04 ad Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.15 2007/03/20 21:07:39 xtraeme Exp $");
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#include "opt_ddb.h"
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#include "opt_mtrr.h"
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@ -56,6 +56,7 @@ __KERNEL_RCSID(0, "$NetBSD: ipifuncs.c,v 1.14 2007/02/09 21:55:04 ad Exp $");
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#include <uvm/uvm_extern.h>
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#include <x86/cpu_msr.h>
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#include <machine/intr.h>
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#include <machine/atomic.h>
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#include <machine/cpuvar.h>
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@ -96,6 +97,8 @@ void (*ipifunc[X86_NIPI])(struct cpu_info *) =
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pmap_do_tlb_shootdown,
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i386_reload_mtrr,
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gdt_reload_cpu,
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msr_read_ipi,
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msr_write_ipi
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};
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void
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@ -1,4 +1,4 @@
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/* $NetBSD: machdep.c,v 1.601 2007/03/07 21:43:43 thorpej Exp $ */
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/* $NetBSD: machdep.c,v 1.602 2007/03/20 21:07:39 xtraeme Exp $ */
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/*-
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* Copyright (c) 1996, 1997, 1998, 2000, 2004, 2006 The NetBSD Foundation, Inc.
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@ -72,7 +72,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.601 2007/03/07 21:43:43 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.602 2007/03/20 21:07:39 xtraeme Exp $");
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#include "opt_beep.h"
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#include "opt_compat_ibcs2.h"
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@ -131,6 +131,8 @@ __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.601 2007/03/07 21:43:43 thorpej Exp $"
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#include <sys/sysctl.h>
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#include <x86/cpu_msr.h>
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#include <machine/cpu.h>
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#include <machine/cpufunc.h>
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#include <machine/cpuvar.h>
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@ -488,6 +490,8 @@ cpu_startup()
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/* Safe for i/o port / memory space allocation to use malloc now. */
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x86_bus_space_mallocok();
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x86_init();
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}
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/*
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.h,v 1.137 2007/03/18 07:21:41 xtraeme Exp $ */
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/* $NetBSD: cpu.h,v 1.138 2007/03/20 21:07:39 xtraeme Exp $ */
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/*-
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* Copyright (c) 1990 The Regents of the University of California.
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@ -141,6 +141,8 @@ struct cpu_info {
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uint32_t ci_cpu_serial[3]; /* PIII serial number */
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uint64_t ci_tsc_freq; /* cpu cycles/second */
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uint64_t ci_msr_rvalue; /* per-cpu MSR returned value */
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const struct cpu_functions *ci_func; /* start/stop functions */
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void (*cpu_setup)(struct cpu_info *);
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/* proc-dependant init */
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@ -1,4 +1,4 @@
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# $NetBSD: files.x86,v 1.26 2007/03/15 00:28:57 xtraeme Exp $
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# $NetBSD: files.x86,v 1.27 2007/03/20 21:07:38 xtraeme Exp $
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# options for MP configuration through the MP spec
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defflag opt_mpbios.h MPBIOS MPVERBOSE MPDEBUG MPBIOS_SCANPCI
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@ -31,6 +31,7 @@ file arch/x86/x86/i8259.c
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file arch/x86/x86/intr.c
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file arch/x86/x86/ipi.c multiprocessor
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file arch/x86/x86/lock_machdep.c lockdebug
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file arch/x86/x86/msr_ipifuncs.c
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file arch/x86/x86/mtrr_i686.c mtrr
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file arch/x86/x86/patch.c
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file arch/x86/x86/softintr.c
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66
sys/arch/x86/include/cpu_msr.h
Normal file
66
sys/arch/x86/include/cpu_msr.h
Normal file
@ -0,0 +1,66 @@
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/* $NetBSD: cpu_msr.h,v 1.1 2007/03/20 21:07:38 xtraeme Exp $ */
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/*-
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* Copyright (c) 2007 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Juan Romero Pardines.
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by the NetBSD
|
||||
* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
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||||
* from this software without specific prior written permission.
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||||
*
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||||
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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||||
* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _X86_CPU_MSR_H
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#define _X86_CPU_MSR_H
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#include <sys/param.h>
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#include <sys/mutex.h>
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#include <machine/intrdefs.h>
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#include <machine/cpu.h>
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#ifdef _KERNEL
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#define MSR_CPU_BROADCAST_READ 0x0001
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#define MSR_CPU_BROADCAST_WRITE 0x0002
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struct msr_cpu_broadcast {
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int msr_type;
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uint64_t msr_value;
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uint64_t msr_mask;
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};
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void x86_init(void);
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void msr_read_ipi(struct cpu_info *);
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void msr_write_ipi(struct cpu_info *);
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void msr_cpu_broadcast_initmtx(void);
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int msr_cpu_broadcast(struct msr_cpu_broadcast *, int);
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#endif /* ! _KERNEL */
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#endif /* ! _X86_CPU_MSR_H */
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@ -1,4 +1,4 @@
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/* $NetBSD: intrdefs.h,v 1.5 2005/11/03 13:06:06 yamt Exp $ */
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/* $NetBSD: intrdefs.h,v 1.6 2007/03/20 21:07:39 xtraeme Exp $ */
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#ifndef _X86_INTRDEFS_H_
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#define _X86_INTRDEFS_H_
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@ -81,12 +81,15 @@
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#define X86_IPI_TLB 0x00000010
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#define X86_IPI_MTRR 0x00000020
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#define X86_IPI_GDT 0x00000040
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#define X86_IPI_READ_MSR 0x00000080
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#define X86_IPI_WRITE_MSR 0x00000100
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#define X86_NIPI 7
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#define X86_NIPI 9
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#define X86_IPI_NAMES { "halt IPI", "timeset IPI", "FPU flush IPI", \
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"FPU synch IPI", "TLB shootdown IPI", \
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"MTRR update IPI", "GDT update IPI" }
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"MTRR update IPI", "GDT update IPI", \
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"MSR read IPI", "MSR write IPI" }
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#define IREENT_MAGIC 0x18041969
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265
sys/arch/x86/x86/msr_ipifuncs.c
Normal file
265
sys/arch/x86/x86/msr_ipifuncs.c
Normal file
@ -0,0 +1,265 @@
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/* $NetBSD: msr_ipifuncs.c,v 1.1 2007/03/20 21:07:39 xtraeme Exp $ */
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/*-
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* Copyright (c) 2007 The NetBSD Foundation, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This code is derived from software contributed to The NetBSD Foundation
|
||||
* by Juan Romero Pardines.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by the NetBSD
|
||||
* Foundation, Inc. and its contributors.
|
||||
* 4. Neither the name of The NetBSD Foundation nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
|
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* Generic IPI handlers to make reads and writes to a MSR on x86, in
|
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* all CPUs available in the system.
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*
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* Thanks to Andrew Doran, Michael Van Elst and Quentin Garnier for
|
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* help and information provided.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: msr_ipifuncs.c,v 1.1 2007/03/20 21:07:39 xtraeme Exp $");
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#include "opt_multiprocessor.h"
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#include <sys/param.h>
|
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#include <sys/mutex.h>
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#include <sys/lock.h>
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|
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#include <x86/cpu_msr.h>
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#include <machine/cpu.h>
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#include <machine/intrdefs.h>
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|
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/* #define MSR_CPU_BROADCAST_DEBUG */
|
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|
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#ifdef MSR_CPU_BROADCAST_DEBUG
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#define DPRINTF(x) do { printf x; } while (/* CONSTCOND */ 0)
|
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#else
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#define DPRINTF(x)
|
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#endif
|
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|
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static kmutex_t msr_mtx;
|
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static volatile uint64_t msr_setvalue;
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static volatile uint64_t msr_setmask;
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static volatile int msr_type;
|
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static volatile int msr_runcount;
|
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|
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static void msr_cpu_broadcast_main(struct msr_cpu_broadcast *, int);
|
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|
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/*
|
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* This function will read the value of the MSR defined in msr_type
|
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* and will return it in ci_msr_rvalue (per-cpu).
|
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*/
|
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void
|
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msr_read_ipi(struct cpu_info *ci)
|
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{
|
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/* Assign current value for the MSR msr_type. */
|
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ci->ci_msr_rvalue = rdmsr(msr_type);
|
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|
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/*
|
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* Increement the counter atomically, this cpu has
|
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* finished the operation correctly.
|
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*/
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__asm volatile ("lock; incl (%0)" :: "r" (&msr_runcount));
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}
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/*
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* This function will write the value of msr_setvalue in the MSR msr_type
|
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* and if a mask is provided, the value will be masked with msr_setmask,
|
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* also will update ci->ci_msr_rvalue with the returned value of the MSR,
|
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* to avoid another run of msr_read_ipi in the main function.
|
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*/
|
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void
|
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msr_write_ipi(struct cpu_info *ci)
|
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{
|
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uint64_t msr;
|
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|
||||
/* Read the MSR requested and apply the mask if defined. */
|
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msr = rdmsr(msr_type);
|
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if (msr_setmask)
|
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msr &= ~msr_setmask;
|
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|
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/* Ok, assign value now.*/
|
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msr |= msr_setvalue;
|
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|
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/* Write it now */
|
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wrmsr(msr_type, msr);
|
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|
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/* Update our per-cpu variable with the current value of the MSR. */
|
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ci->ci_msr_rvalue = rdmsr(msr_type);
|
||||
|
||||
/* This cpu has finished making all tasks, update the counter. */
|
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__asm volatile ("lock; incl (%0)" :: "r" (&msr_runcount));
|
||||
}
|
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|
||||
/*
|
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* Main function. Assigns values provided by the driver into the global
|
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* variables, necessary for the IPI handlers. If mode is true, a write
|
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* operation will be performed, otherwise a read operation.
|
||||
*/
|
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static void
|
||||
msr_cpu_broadcast_main(struct msr_cpu_broadcast *mcb, int mode)
|
||||
{
|
||||
CPU_INFO_ITERATOR cii;
|
||||
struct cpu_info *ci;
|
||||
|
||||
DPRINTF(("\n%s: ---- START ----\n", __func__));
|
||||
|
||||
/* We only want one CPU at a time sending these IPIs out. */
|
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mutex_enter(&msr_mtx);
|
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|
||||
/* Initialize counter, the task has not run in any cpu yet. */
|
||||
msr_runcount = msr_setmask = msr_setvalue = 0;
|
||||
|
||||
/* Assign requested MSR type, value and mask. */
|
||||
msr_type = mcb->msr_type;
|
||||
|
||||
if (mode) {
|
||||
msr_setvalue = mcb->msr_value;
|
||||
msr_setmask = mcb->msr_mask;
|
||||
}
|
||||
|
||||
/*
|
||||
* Issue a full memory barrier, to make sure the operations
|
||||
* are done in a serialized way.
|
||||
*/
|
||||
mb_memory();
|
||||
|
||||
if (mode) { /* Write mode */
|
||||
|
||||
DPRINTF(("%s: before write\n", __func__));
|
||||
|
||||
/* Run the IPI write handler in the CPUs. */
|
||||
msr_write_ipi(curcpu());
|
||||
|
||||
#ifdef MULTIPROCESSOR
|
||||
if (ncpu > 1)
|
||||
x86_broadcast_ipi(X86_IPI_WRITE_MSR);
|
||||
#endif
|
||||
|
||||
DPRINTF(("%s: after write\n", __func__));
|
||||
|
||||
} else { /* Read mode */
|
||||
|
||||
DPRINTF(("%s: before read\n", __func__));
|
||||
|
||||
/* Run the IPI read handler in the CPUs. */
|
||||
msr_read_ipi(curcpu());
|
||||
|
||||
#ifdef MULTIPROCESSOR
|
||||
if (ncpu > 1)
|
||||
x86_broadcast_ipi(X86_IPI_READ_MSR);
|
||||
#endif
|
||||
|
||||
DPRINTF(("%s: after read\n", __func__));
|
||||
}
|
||||
|
||||
DPRINTF(("%s: before pause\n", __func__));
|
||||
DPRINTF(("%s: msr_runcount=%d ncpu=%d\n", __func__,
|
||||
msr_runcount, ncpu));
|
||||
|
||||
/* Spin until every CPU has run the handler. */
|
||||
while (msr_runcount < ncpu)
|
||||
x86_pause();
|
||||
|
||||
DPRINTF(("%s: after pause\n", __func__));
|
||||
|
||||
for (CPU_INFO_FOREACH(cii, ci)) {
|
||||
DPRINTF(("%s: ci_msr_rvalue=0x%" PRIu64 "\n",
|
||||
ci->ci_dev->dv_xname, ci->ci_msr_rvalue));
|
||||
}
|
||||
|
||||
/* We're done, so unlock. */
|
||||
mutex_exit(&msr_mtx);
|
||||
|
||||
DPRINTF(("%s: ----- END -----\n\n", __func__));
|
||||
}
|
||||
|
||||
/*
|
||||
* Initializes the mutex very early in the boot process
|
||||
* for future access.
|
||||
*/
|
||||
void
|
||||
msr_cpu_broadcast_initmtx(void)
|
||||
{
|
||||
mutex_init(&msr_mtx, MUTEX_DRIVER, IPL_NONE);
|
||||
}
|
||||
|
||||
/*
|
||||
* This is the function used by the drivers using this framework.
|
||||
* The driver is reponsible to set apropiately its members:
|
||||
*
|
||||
* mcb->msr_type type of the MSR requested by the driver,
|
||||
* e.g MSR_PERF_STATUS.
|
||||
*
|
||||
* mcb->msr_value value that will be set in the MSR, when a
|
||||
* write operation is requested by the driver.
|
||||
*
|
||||
* mcb->msr_mask value that will be used to mask the returned
|
||||
* value of the rdmsr(msr_type) call in the write
|
||||
* operation.
|
||||
*
|
||||
* msr_type needs to be defined, otherwise EINVAL is returned.
|
||||
*
|
||||
* When calling this function, a mode must be selected. Currently
|
||||
* two modes are implemented:
|
||||
*
|
||||
* MSR_CPU_BROADCAST_READ Performs a read operation.
|
||||
*
|
||||
* MSR_CPU_BROADCAST_WRITE Performs a write operation.
|
||||
*
|
||||
* If an invalid mode is specified, EINVAL is returned.
|
||||
*/
|
||||
int
|
||||
msr_cpu_broadcast(struct msr_cpu_broadcast *mcb, int mode)
|
||||
{
|
||||
if (!mcb->msr_type) {
|
||||
DPRINTF(("%s: msr_type is empty\n", __func__));
|
||||
return EINVAL;
|
||||
}
|
||||
|
||||
DPRINTF(("%s: mcb->msr_value=%" PRIu64 " mcb->msr_type=%d "
|
||||
"mcb->msr_mask=%" PRIu64 "\n", __func__,
|
||||
mcb->msr_value, mcb->msr_type, mcb->msr_mask));
|
||||
|
||||
switch (mode) {
|
||||
case MSR_CPU_BROADCAST_READ:
|
||||
msr_cpu_broadcast_main(mcb, false);
|
||||
break;
|
||||
case MSR_CPU_BROADCAST_WRITE:
|
||||
msr_cpu_broadcast_main(mcb, true);
|
||||
break;
|
||||
default:
|
||||
return EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: x86_machdep.c,v 1.8 2007/03/01 11:49:26 yamt Exp $ */
|
||||
/* $NetBSD: x86_machdep.c,v 1.9 2007/03/20 21:07:39 xtraeme Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2005 The NetBSD Foundation, Inc.
|
||||
@ -37,7 +37,7 @@
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: x86_machdep.c,v 1.8 2007/03/01 11:49:26 yamt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: x86_machdep.c,v 1.9 2007/03/20 21:07:39 xtraeme Exp $");
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <sys/param.h>
|
||||
@ -46,6 +46,8 @@ __KERNEL_RCSID(0, "$NetBSD: x86_machdep.c,v 1.8 2007/03/01 11:49:26 yamt Exp $")
|
||||
#include <sys/errno.h>
|
||||
#include <sys/kauth.h>
|
||||
|
||||
#include <x86/cpu_msr.h>
|
||||
|
||||
#include <machine/bootinfo.h>
|
||||
#include <machine/vmparam.h>
|
||||
|
||||
@ -125,3 +127,12 @@ x86_pause(void)
|
||||
{
|
||||
__asm volatile("pause");
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is to initialize the mutex used by x86/msr_ipifuncs.c.
|
||||
*/
|
||||
void
|
||||
x86_init(void)
|
||||
{
|
||||
msr_cpu_broadcast_initmtx();
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user