Commit Graph

17 Commits

Author SHA1 Message Date
thorpej
0e82abb5de Add MIPS3_5200. 2001-06-10 05:02:33 +00:00
simonb
e5bd00e48d For ports that wire up pciide in compatibility mode, have
them define __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH
in pci_machdep.h and pciide_map_compat_intr() only calls
pciide_machdep_compat_intr_establish() if that preprocessor
define exists.

Ports that don't need to do this no longer need to supply a
dummy function.
2001-06-08 04:48:54 +00:00
thorpej
2b5df8b7ff vm_page_t -> struct vm_page * 2001-06-01 19:52:54 +00:00
thorpej
71cb790fb5 Add support for the Algorithmics P-4032 board. This is totally
untested, since I have no P-4032 board, but it's no worse than
the current situation, which is "totally non-working P-4032
support in the ARC port, of all places".
2001-06-01 16:00:03 +00:00
thorpej
23a3dc1508 If a bus doens't want to use an extent, don't force it to. 2001-06-01 15:57:31 +00:00
thorpej
356699e86b Fat-trimming. 2001-06-01 15:30:11 +00:00
thorpej
c702830c42 The P-4032 has no ISA bridge/bus, so remove all P-4032 conditionals. 2001-06-01 15:20:06 +00:00
thorpej
f4f6c1dd1c Enable SCSI. 2001-06-01 03:53:29 +00:00
nisimura
1f4f9ae5c2 Fix minor typos. 2001-05-31 07:24:23 +00:00
enami
299159546d s/Alpha/MIPS/ in comment. 2001-05-31 02:20:55 +00:00
lukem
d84d2c6c85 add missing #include "opt_kgdb.h" 2001-05-30 15:24:23 +00:00
mrg
67afbd6270 use _KERNEL_OPT 2001-05-30 11:57:16 +00:00
thorpej
f0c1fb1bb2 Initialize DDB at boot time and break into it if the "d" argument
is specified to the kernel.

XXX PMON doen't load symbols for us -- need a dbsym(1) for ELF.
2001-05-29 18:40:25 +00:00
thorpej
f2800b2299 Don't have conf.h (pasto). 2001-05-28 23:25:25 +00:00
thorpej
9d8dc820a8 Forgot bsd.kinc.mk 2001-05-28 22:34:25 +00:00
thorpej
af63f8979c D'oh, clear the soft interrupt bits in CAUSE *before* servicing
soft interrupts, rather than after, so that soft interrupts scheduled
by other soft interrupts don't get lost.
2001-05-28 18:19:27 +00:00
thorpej
16b9c60621 A port to the Algorithmics MIPS evaluation boards. We currently
support the P-5064, which has a QED RM5xxx CPU soldered on.

There is some skeletal support for the P-4032 (an older board, which
had an R4xxx CPU).  There are some placeholders for the P-6032, which
is their newest board, but no real code yet (the P-6032 has a different
PCI controller, the Algorithmics BONITO).

There are still some (apprently softintr-related) problems with the
algor kernel, but it works well-enough to self-host.

Kudos to Allegro Networks for loaning me a P-5064 board on which to do
the port.
2001-05-28 16:22:13 +00:00