Aren/NetBSD
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
173,192 Commits 606 Branches 0 Tags 3.1 GiB
0de5da9678
Commit Graph

941 Commits

Author SHA1 Message Date
matt
91d4704c12 Update <machine/ieeefp.h> to use the C99 FE_* definitions instead of the 
NetBSD defined ones.  Redefine the NetBSD ones in terms of the C99 ones.
Step 1 to having <fenv.h>
 2008-08-05 16:47:41 +00:00
ad
b94f79f0e8 Replce exec_map with a pool. Proposed on tech-kern@, reviewed by chs@. 2008-07-02 17:28:54 +00:00
cegger
2dea63fe78 use device_lookup_private to get softc 2008-06-13 13:08:57 +00:00
uwe
b3f49ac041 sh_vector_generic - reorder literals to improve locality of reference. 2008-06-08 23:45:33 +00:00
uwe
1a80db70f1 Match PC address for single-stepping, program BARA = tf->tf_spc before 
returning from exception.

Makes single-stepping work on sh3 - without matching the address sh3
gets stuck at the instruction we are at, getting EXPEVT_BREAK before
executing the instruction.
 2008-06-08 22:13:09 +00:00
uwe
ce2ea531e9 Use "pc" and "sr" instead of "spc" and "ssr" to refer to those 
registers in DDB.  Names with initial "s" (for "saved") are somewhat
confusing to use.  The fact that we use SPC/SSR registers to retrieve
values of PC/SR at the moment of trap is an immaterial implementation
detail.
 2008-06-08 22:02:08 +00:00
uwe
bb8100256b Cosmetics: add blank lines to make db_trap() call more prominent. 
s/kdb/ddb/ is a comment (does anyone really still calls it kdb?)
 2008-06-07 22:37:11 +00:00
uwe
dcbf54d0f9 We never pass type = -1 to kdb_trap() so g/c that cargo-culted case. 2008-06-07 22:32:18 +00:00
uwe
720af5afe1 Fix IS_BREAKPOINT_TRAP: EXP_BREAK is not a breakpoint trap, it's UBC 
(user break controller) trap, and we use UBC for single-stepping, not
for ddb breakpoints.  ddb breakpoints are "trapa 0xc3".
 2008-06-07 22:22:10 +00:00
uwe
5fc69ea9ab Pass trap code to kgdb_trap(). 2008-06-07 22:04:40 +00:00
uwe
3a3f6e0005 Use _SH_TRA_BREAK instead of hardcoded constant under ifdef KGDB too. 2008-06-07 04:01:41 +00:00
uwe
5a5542fb41 Sync icache before returning from db_write_bytes so that we don't get 
stuck at a ddb breakpoint.
 2008-06-07 03:25:13 +00:00
uwe
d5b6c91596 print trapa operand in hex. 2008-06-07 02:43:10 +00:00
uwe
e888b109ca Move EXPEVT_BREAK case next to EXPEVT_TRAPA case, they both generate 
SIGTRAP and it's easier to read when they are together.
 2008-06-07 00:51:55 +00:00
uwe
421349f332 Bah, got tf_ubc = 0 logic wrong in previous. Revert that part, it's bogus. 2008-06-06 04:24:19 +00:00
uwe
2cef892cf9 Support single-stepping in DDB for sh3 too, it has different format of 
UBC registers.
 2008-06-06 04:16:22 +00:00
uwe
db245f3eb5 Provide defines for bits we use. 2008-06-06 03:17:28 +00:00
uwe
c39ae7f5d7 Recycle unused _REG_EXPEVT slot in mcontext for _REG_GBR. 
As the size of mcontext is not changed, we avoid the hassle of
versioning all the calls that use it.

_REG_EXPEVT was never used by any code in the tree.  Reporting EXPEVT
makes sense only for signals and in that case we pass it to userland
in ksi_trap already which is official MI way to get this (MD) information.

Old binaries running on new kernels will now have their GBR set from
new mcontext, but that's ok too, as GBR was not properly supported by
old kernels (not saved in trapframe), so old binaries couldn't have
possibly used it anyway.
 2008-06-01 23:07:20 +00:00
uwe
70f9d18086 Add GBR register to switchframe. 
While here, reorder switchframe so that we can shave off a few
instructions when restoring it (group stack registers at the end, make
sure that last and first registers are safe to load/store in delay
slots).
 2008-06-01 01:43:20 +00:00
uwe
ff6926e860 Add GBR register to trapframe. 2008-06-01 00:46:01 +00:00
uwe
8b03821c47 In __EXCEPTION_RETURN use ldc.l to shave off couple of instructions. 2008-05-31 22:45:32 +00:00
chs
6740bb5440 enable profiling of assembly functions. 2008-05-25 15:56:11 +00:00
ad
1e62ed170b Remove unneeded playing about with kernel_lock. 2008-05-21 14:07:29 +00:00
uwe
3b6480932b Add semicolon that was lost some 5 years ago. 
Reported missing by proper do-while macro hygiene in systm.h.
 2008-05-20 20:43:30 +00:00
uwe
39fcc155cc Default COPTS to "-Os -freorder-blocks" which is ~= -O2 but without 
-falign-* that is too zealous for low-memory sh3 machines.  I've been
using this for my hpcsh and landisk kernels for a very long time.
(besides, it's not 2001 anymore and pkgsrc/cross/sh is long since gone).
 2008-05-06 02:25:19 +00:00
martin
11a6dbe728 Convert TNF licenses to new 2 clause variant 2008-04-30 13:10:46 +00:00
martin
ce099b4099 Remove clause 3 and 4 from TNF licenses 2008-04-28 20:22:51 +00:00
ad
284c2b9aef Merge proc::p_mutex and proc::p_smutex into a single adaptive mutex, since 
we no longer need to guard against access from hardware interrupt handlers.

Additionally, if cloning a process with CLONE_SIGHAND, arrange to have the
child process share the parent's lock so that signal state may be kept in
sync. Partially addresses PR kern/37437.
 2008-04-24 18:39:20 +00:00
uwe
94ad439b55 Handle leaf routines that were interrupted. 
Clean up/prettify debug printfs and compile them unconditionally,
but only enable them if db_trace_debug is set.
 2008-04-15 00:18:27 +00:00
uwe
178f553d3a Use cfdata_t, aprint_*. 2008-03-27 03:16:29 +00:00
uwe
043b797d5d Convert to use CFATTACH_DECL_NEW (no softc). 2008-03-27 02:05:43 +00:00
uwe
3e56f06adf Split device_t and softc. 2008-03-27 02:03:03 +00:00
uwe
94dcf58d14 Split device_t and softc. 2008-03-27 01:48:50 +00:00
uwe
8e76b33398 Use device_t, &c. Convert to use CFATTACH_DECL_NEW (no softc). 2008-03-27 00:42:43 +00:00
uwe
fb3a817da5 Add RCSID comment. 2008-03-27 00:32:58 +00:00
uwe
30cb91aa35 Split device_t and softc. Use aprint_*. 2008-03-27 00:31:06 +00:00
uwe
9c577c1e80 Use device_t. Convert to use CFATTACH_DECL_NEW. 2008-03-27 00:23:40 +00:00
uwe
ff0e77e824 Use device_t. Convert to use CFATTACH_DECL_NEW. 2008-03-26 23:49:16 +00:00
uwe
4ad267c0da Fix R_SH_DIR32 calculation (XXX: some other relocs look wrong too). 
Sync icache after module is linked.
 2008-03-26 22:45:50 +00:00
uwe
ee4c6e644b G/c old softint code. 2008-03-23 06:07:08 +00:00
uwe
91731665c3 intc_intr_enable/disable: TMU3 and TMU4 are handled by INTPRI00 &co. 
Correctly propagate requests to enable/disable their interrupts.
 2008-03-23 05:53:47 +00:00
uwe
3328e83196 Sort SH4_INTEVT_PCI* codes. 2008-03-23 05:45:45 +00:00
uwe
823b306d1e Revert interrupt stack changes. There are some issues and, at least 
in the current form, they complicate implementation of fast software
interrupts.  I'd rather get fast softints in now and may be revisit
interrupt stack later.
 2008-03-22 03:23:27 +00:00
uwe
57ea1b0849 Oops, delete commented out line forgotten in previous. 2008-03-22 00:21:52 +00:00
uwe
18d9c9643e On SH4 we must be running on P2 to access memory-mapped TLB arrays. 
Print DA2 again - that messenger was shot in 1.34
 2008-03-22 00:15:41 +00:00
uwe
f0757531d4 Only SH7750 and SH7750S require updates to memory-mapped data cache 
arrays to be performed while running on P2.  Don't penalize other cpus
that can do it from P1.
 2008-03-16 19:17:53 +00:00
uwe
04e0ee32b2 Rewrite RUN_P2, RUN_P1 in asm. gcc4 is too happy to optimize away 
assigned-goto versions if try to do anything fancy with them
(discovered by trying to wrap RUN_P2 into an "if").
 2008-03-16 19:14:08 +00:00
uwe
66575b7b12 If we bother to report number of wired TLB entries we might as well do 
it correctly.
 2008-03-16 07:16:37 +00:00
uwe
5c45d9ed62 defflag cache related options. 2008-03-15 22:48:58 +00:00
uwe
2e62be9d52 Add "mach reset" command that resets machine by taking a trap with 
exceptions disabled.  Fix db_stackcheck_cmd (have_addr is now bool).
Supply help strings for mach commands.
 2008-03-15 01:03:40 +00:00