1. Add power control to reduce power consumption.
The behavior can be controlled by mixerctl(1).
2. Add suspend/resume hook to keep the parameters.
Currently this includes CODEC and control registers but
does not include the DMA state. FIXME.
3. Support "opl at ym" and "mpu at ym" attachment.
Actually, this is required for power control.
4. Add support for the on-chip 3D enhancement hardware.
This includes bass/treble enhancement, wide stereo, and
the equalization mode. This can be controlled by mixerctl(1).
5. Make "audioctl -w play.gain=xxx" work like as
"mixerctl -w inputs.dac=xxx" and now it changes
the wave output volume correctly.
6. Support hardware master volume switches.
7. Change formula of calculating gain so that all the levels
should be used equally.
8. Change "audioctl name" to "OPL3-SA3" and "audioctl version"
to the version of the chip.
Connectivity Products:
ABP510/5150 - Bus-Master ISA (240 CDB) (Footnote 1)
ABP5140 - Bus-Master ISA (16 CDB) (Footnote 1) (Footnote 2)
ABP5142 - Bus-Master ISA with floppy (16 CDB) (Footnote 3)
Single Channel Products:
ABP542 - Bus-Master ISA with floppy (240 CDB)
Footnotes:
1. This board has been shipped by HP with the 4020i CD-R drive.
The board has no BIOS so it cannot control a boot device, but
it can control any secondary SCSI device.
2. This board has been sold by SIIG as the i540 SpeedMaster.
3. This board has been sold by SIIG as the i542 SpeedMaster.
is a muting control, not a level control, change the name to reflect that.
XXX The fact that the audio code depends on the string names of the
XXX mixer devices is bogus.
the kernel can get a 'protection fault trap' later. Enable the 32 bits I/O
test conditionally on a config flag, disabled by default (problem
reported by kurt.schreiner@uni-mainz.de).
directly, call the function pointer (*if_input)(ifp, m). The input routine
expects the packet header to be at the head of the packet, and will adjust
as necessary. Privatize the layer 2 input and output routines, allowing
*_ifattach() to set them up as appropriate.
Reorganise the driver some what.
Rename tr_reset() to the more appropriate tr_stop().
Create a common tropic reset routine and use it in the frontends.
Move the code in tr_config() which is only used in the card attachment
routines into a new tr_attach() function.
Take adapter off the ring through tr_shutdown() in a shutdown hook.
This simplifies the bus-specific frontend.
Verify EEPROM checksum, extract card rev-level, test capabilities
word, then test high-order config bits to verify card is in PnP mode,
and skip if so.
- Don't rely on ATA signature: some ide controllers seems to not transmit it
properly (SIMIDE on arm32 machines). Instead, when we guess a drive is here
after reset, just mark it as ATA and OLD is it's not ATAPI.
- at attach time, use IDENTIFY to eliminate ghost from the probe. If the
drive had the old flag and IDENTIFY failed, issue a WDCC_RECAL command
to detect a pre-ATA disk. If IDENTIFY succeded, remove the OLD flag,
it's obviously not a pre-ATA disk.
- add a new controller flag, WDC_CAPABILITY_PREATA, used to shorcut parts
of the probe (not necessary, but makes the probe/attach faster). This is
only set by the ISA front-end, all other controllers supported can't have
pre-ATA drives attached.
The mechanism used are more or less the same as before, they have just been
reordered. Should solve port-arm32/7324 (waiting for feedback).
in not just used to access memory but is bassed to bus_space_xxx_n()
methods. For debugging purposes, bus_space can have additional constraints
which will be properly met by BUS_SPACE_ALIGNED_POINTER().
* Rearrange the speed mapping table and adjust the code so that the highest
rate can actually be used. Previously we ended up rounding up slightly
lower speeds and then losing because set_params couldn't set the mode
back to the current one.
* Allow 260 as a valid I/O address, since the SB1 can be jumpered to this.
* Change the MPU-401 code so it can be attached as a separate device.
(XXX Really, the SB code ought to just attach a subdevice itself.)
* Do not attach an OPL on the SB1. Writing to the OPL registers at
SB_base+0 on this card wedges my machine.
(XXX Should we access it at 388 instead? The Creative web site claims
that this board *does* have an OPL2, but I haven't played with this
extensively.)
* Allocate the SB DMA channels at open time, rather than attach time, so
that a single DRQ can be used for multiple cards (if only one is in use
at a given time).
(XXX Let me tell you why this is a horrible hack. If the ISA DMA code
tries to allocate a bounce buffer after boot time, it will generally fail,
because there is no contiguous memory below 16MB and the code to allocate
contiguous pages doesn't know how to move things around. Now, we
shouldn't ever be using bounce buffers here, because we use
isa_dmamem_alloc(). So we just turn off BUS_DMA_ALLOCNOW and we don't
actually try to. That's cool, and it even works, but isa_dmamem_alloc()
has the same problem. It just happens that we allocate the ring buffers
at boot time, and whenever we reallocate them (due to the buffer size
changing), we just deallocated the previous (contiguous) buffer, so we get
lucky. This is absolutely disgusting and needs to be fixed.)
* Use a single routine to halt both input and output on Audio1.
* Reduce the number of register reads/writes used to set up a channel.
* A few other minor things.
* Separate the interrupt handlers based on which channel (audio1/audio2)
rather than which direction (input/output). Only register the handler for
audio1 on the 1788.
* Since the input sides are actually the same, GC the duplicated code.
* Re-KNF in a bunch of places.
* Make this work again on the 1887 in the Shark.
This is a workaround for crappy hardware, normal keyboard controllers
return a "0".
Should fix PR port-i386/6636 by Krister Walfridsson and problems
reported by chopps and fvdl.
itohy