Add separate halt_output and halt_input routines.
This commit is contained in:
parent
591a968873
commit
5e2fc07a14
@ -1,4 +1,4 @@
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/* $NetBSD: pas.c,v 1.45 1999/02/17 02:37:41 mycroft Exp $ */
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/* $NetBSD: pas.c,v 1.46 1999/02/18 07:08:36 mycroft Exp $ */
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/*
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* Copyright (c) 1991-1993 Regents of the University of California.
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@ -131,8 +131,8 @@ struct audio_hw_if pas_hw_if = {
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0,
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0,
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0,
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sbdsp_haltdma,
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sbdsp_haltdma,
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sbdsp_halt_output,
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sbdsp_halt_input,
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sbdsp_speaker_ctl,
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pas_getdev,
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0,
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@ -1,4 +1,4 @@
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/* $NetBSD: sb.c,v 1.64 1999/02/17 02:37:41 mycroft Exp $ */
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/* $NetBSD: sb.c,v 1.65 1999/02/18 07:08:35 mycroft Exp $ */
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/*
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* Copyright (c) 1991-1993 Regents of the University of California.
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@ -110,8 +110,8 @@ struct audio_hw_if sb_hw_if = {
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0,
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0,
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0,
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sbdsp_haltdma,
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sbdsp_haltdma,
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sbdsp_halt_output,
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sbdsp_halt_input,
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sbdsp_speaker_ctl,
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sb_getdev,
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0,
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@ -1,4 +1,4 @@
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/* $NetBSD: sbdsp.c,v 1.92 1999/02/17 02:43:14 mycroft Exp $ */
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/* $NetBSD: sbdsp.c,v 1.93 1999/02/18 07:08:35 mycroft Exp $ */
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/*
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* Copyright (c) 1991-1993 Regents of the University of California.
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@ -129,48 +129,49 @@ struct sbmode {
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u_char precision;
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u_short lowrate, highrate;
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u_char cmd;
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u_char halt, cont;
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u_char cmdchan;
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};
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static struct sbmode sbpmodes[] = {
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{ SB_1, 1, 8, 4000, 22727, SB_DSP_WDMA },
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{ SB_20, 1, 8, 4000, 22727, SB_DSP_WDMA_LOOP },
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{ SB_2x, 1, 8, 4000, 22727, SB_DSP_WDMA_LOOP },
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{ SB_2x, 1, 8, 22727, 45454, SB_DSP_HS_OUTPUT },
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{ SB_PRO, 1, 8, 4000, 22727, SB_DSP_WDMA_LOOP },
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{ SB_PRO, 1, 8, 22727, 45454, SB_DSP_HS_OUTPUT },
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{ SB_PRO, 2, 8, 11025, 22727, SB_DSP_HS_OUTPUT },
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{ SB_1, 1, 8, 4000,22727,SB_DSP_WDMA ,SB_DSP_HALT ,SB_DSP_CONT },
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{ SB_20, 1, 8, 4000,22727,SB_DSP_WDMA_LOOP,SB_DSP_HALT ,SB_DSP_CONT },
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{ SB_2x, 1, 8, 4000,22727,SB_DSP_WDMA_LOOP,SB_DSP_HALT ,SB_DSP_CONT },
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{ SB_2x, 1, 8,22727,45454,SB_DSP_HS_OUTPUT,SB_DSP_HALT ,SB_DSP_CONT },
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{ SB_PRO, 1, 8, 4000,22727,SB_DSP_WDMA_LOOP,SB_DSP_HALT ,SB_DSP_CONT },
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{ SB_PRO, 1, 8,22727,45454,SB_DSP_HS_OUTPUT,SB_DSP_HALT ,SB_DSP_CONT },
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{ SB_PRO, 2, 8,11025,22727,SB_DSP_HS_OUTPUT,SB_DSP_HALT ,SB_DSP_CONT },
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/* Yes, we write the record mode to set 16-bit playback mode. weird, huh? */
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{ SB_JAZZ, 1, 8, 4000, 22727, SB_DSP_WDMA_LOOP, SB_DSP_RECORD_MONO },
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{ SB_JAZZ, 1, 8, 22727, 45454, SB_DSP_HS_OUTPUT, SB_DSP_RECORD_MONO },
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{ SB_JAZZ, 2, 8, 11025, 22727, SB_DSP_HS_OUTPUT, SB_DSP_RECORD_STEREO },
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{ SB_JAZZ, 1, 16, 4000, 22727, SB_DSP_WDMA_LOOP, JAZZ16_RECORD_MONO },
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{ SB_JAZZ, 1, 16, 22727, 45454, SB_DSP_HS_OUTPUT, JAZZ16_RECORD_MONO },
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{ SB_JAZZ, 2, 16, 11025, 22727, SB_DSP_HS_OUTPUT, JAZZ16_RECORD_STEREO },
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{ SB_16, 1, 8, 5000, 45000, SB_DSP16_WDMA_8 },
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{ SB_16, 2, 8, 5000, 45000, SB_DSP16_WDMA_8 },
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{ SB_JAZZ,1, 8, 4000,22727,SB_DSP_WDMA_LOOP,SB_DSP_HALT ,SB_DSP_CONT ,SB_DSP_RECORD_MONO },
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{ SB_JAZZ,1, 8,22727,45454,SB_DSP_HS_OUTPUT,SB_DSP_HALT ,SB_DSP_CONT ,SB_DSP_RECORD_MONO },
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{ SB_JAZZ,2, 8,11025,22727,SB_DSP_HS_OUTPUT,SB_DSP_HALT ,SB_DSP_CONT ,SB_DSP_RECORD_STEREO },
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{ SB_JAZZ,1,16, 4000,22727,SB_DSP_WDMA_LOOP,SB_DSP_HALT ,SB_DSP_CONT ,JAZZ16_RECORD_MONO },
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{ SB_JAZZ,1,16,22727,45454,SB_DSP_HS_OUTPUT,SB_DSP_HALT ,SB_DSP_CONT ,JAZZ16_RECORD_MONO },
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{ SB_JAZZ,2,16,11025,22727,SB_DSP_HS_OUTPUT,SB_DSP_HALT ,SB_DSP_CONT ,JAZZ16_RECORD_STEREO },
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{ SB_16, 1, 8, 5000,45000,SB_DSP16_WDMA_8 ,SB_DSP_HALT ,SB_DSP_CONT },
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{ SB_16, 2, 8, 5000,45000,SB_DSP16_WDMA_8 ,SB_DSP_HALT ,SB_DSP_CONT },
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#define PLAY16 15 /* must be the index of the next entry in the table */
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{ SB_16, 1, 16, 5000, 45000, SB_DSP16_WDMA_16 },
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{ SB_16, 2, 16, 5000, 45000, SB_DSP16_WDMA_16 },
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{ SB_16, 1,16, 5000,45000,SB_DSP16_WDMA_16,SB_DSP16_HALT,SB_DSP16_CONT},
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{ SB_16, 2,16, 5000,45000,SB_DSP16_WDMA_16,SB_DSP16_HALT,SB_DSP16_CONT},
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{ -1 }
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};
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static struct sbmode sbrmodes[] = {
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{ SB_1, 1, 8, 4000, 12987, SB_DSP_RDMA },
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{ SB_20, 1, 8, 4000, 12987, SB_DSP_RDMA_LOOP },
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{ SB_2x, 1, 8, 4000, 12987, SB_DSP_RDMA_LOOP },
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{ SB_2x, 1, 8, 12987, 14925, SB_DSP_HS_INPUT },
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{ SB_PRO, 1, 8, 4000, 22727, SB_DSP_RDMA_LOOP, SB_DSP_RECORD_MONO },
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{ SB_PRO, 1, 8, 22727, 45454, SB_DSP_HS_INPUT, SB_DSP_RECORD_MONO },
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{ SB_PRO, 2, 8, 11025, 22727, SB_DSP_HS_INPUT, SB_DSP_RECORD_STEREO },
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{ SB_JAZZ, 1, 8, 4000, 22727, SB_DSP_RDMA_LOOP, SB_DSP_RECORD_MONO },
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{ SB_JAZZ, 1, 8, 22727, 45454, SB_DSP_HS_INPUT, SB_DSP_RECORD_MONO },
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{ SB_JAZZ, 2, 8, 11025, 22727, SB_DSP_HS_INPUT, SB_DSP_RECORD_STEREO },
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{ SB_JAZZ, 1, 16, 4000, 22727, SB_DSP_RDMA_LOOP, JAZZ16_RECORD_MONO },
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{ SB_JAZZ, 1, 16, 22727, 45454, SB_DSP_HS_INPUT, JAZZ16_RECORD_MONO },
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{ SB_JAZZ, 2, 16, 11025, 22727, SB_DSP_HS_INPUT, JAZZ16_RECORD_STEREO },
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{ SB_16, 1, 8, 5000, 45000, SB_DSP16_RDMA_8 },
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{ SB_16, 2, 8, 5000, 45000, SB_DSP16_RDMA_8 },
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{ SB_16, 1, 16, 5000, 45000, SB_DSP16_RDMA_16 },
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{ SB_16, 2, 16, 5000, 45000, SB_DSP16_RDMA_16 },
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{ SB_1, 1, 8, 4000,12987,SB_DSP_RDMA ,SB_DSP_HALT ,SB_DSP_CONT },
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{ SB_20, 1, 8, 4000,12987,SB_DSP_RDMA_LOOP,SB_DSP_HALT ,SB_DSP_CONT },
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{ SB_2x, 1, 8, 4000,12987,SB_DSP_RDMA_LOOP,SB_DSP_HALT ,SB_DSP_CONT },
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{ SB_2x, 1, 8,12987,14925,SB_DSP_HS_INPUT ,SB_DSP_HALT ,SB_DSP_CONT },
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{ SB_PRO, 1, 8, 4000,22727,SB_DSP_RDMA_LOOP,SB_DSP_HALT ,SB_DSP_CONT ,SB_DSP_RECORD_MONO },
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{ SB_PRO, 1, 8,22727,45454,SB_DSP_HS_INPUT ,SB_DSP_HALT ,SB_DSP_CONT ,SB_DSP_RECORD_MONO },
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{ SB_PRO, 2, 8,11025,22727,SB_DSP_HS_INPUT ,SB_DSP_HALT ,SB_DSP_CONT ,SB_DSP_RECORD_STEREO },
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{ SB_JAZZ,1, 8, 4000,22727,SB_DSP_RDMA_LOOP,SB_DSP_HALT ,SB_DSP_CONT ,SB_DSP_RECORD_MONO },
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{ SB_JAZZ,1, 8,22727,45454,SB_DSP_HS_INPUT ,SB_DSP_HALT ,SB_DSP_CONT ,SB_DSP_RECORD_MONO },
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{ SB_JAZZ,2, 8,11025,22727,SB_DSP_HS_INPUT ,SB_DSP_HALT ,SB_DSP_CONT ,SB_DSP_RECORD_STEREO },
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{ SB_JAZZ,1,16, 4000,22727,SB_DSP_RDMA_LOOP,SB_DSP_HALT ,SB_DSP_CONT ,JAZZ16_RECORD_MONO },
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{ SB_JAZZ,1,16,22727,45454,SB_DSP_HS_INPUT ,SB_DSP_HALT ,SB_DSP_CONT ,JAZZ16_RECORD_MONO },
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{ SB_JAZZ,2,16,11025,22727,SB_DSP_HS_INPUT ,SB_DSP_HALT ,SB_DSP_CONT ,JAZZ16_RECORD_STEREO },
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{ SB_16, 1, 8, 5000,45000,SB_DSP16_RDMA_8 ,SB_DSP_HALT ,SB_DSP_CONT },
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{ SB_16, 2, 8, 5000,45000,SB_DSP16_RDMA_8 ,SB_DSP_HALT ,SB_DSP_CONT },
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{ SB_16, 1,16, 5000,45000,SB_DSP16_RDMA_16,SB_DSP16_HALT,SB_DSP16_CONT},
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{ SB_16, 2,16, 5000,45000,SB_DSP16_RDMA_16,SB_DSP16_HALT,SB_DSP16_CONT},
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{ -1 }
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};
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@ -692,13 +693,6 @@ sbdsp_set_params(addr, setmode, usemode, play, rec)
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}
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/*
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* XXX
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* Should wait for chip to be idle.
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*/
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sc->sc_i.run = SB_NOTRUNNING;
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sc->sc_o.run = SB_NOTRUNNING;
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if (sc->sc_fullduplex &&
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usemode == (AUMODE_PLAY | AUMODE_RECORD) &&
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sc->sc_i.dmachan == sc->sc_o.dmachan) {
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@ -716,7 +710,7 @@ sbdsp_set_params(addr, setmode, usemode, play, rec)
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DPRINTF(("sbdsp_set_params ichan=%d, ochan=%d\n",
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sc->sc_i.dmachan, sc->sc_o.dmachan));
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return 0;
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return (0);
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}
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void
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@ -896,13 +890,15 @@ sbdsp_close(addr)
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DPRINTF(("sbdsp_close: sc=%p\n", sc));
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sc->sc_open = SB_CLOSED;
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sbdsp_spkroff(sc);
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sc->spkr_state = SPKR_OFF;
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sbdsp_halt_output(sc);
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sbdsp_halt_input(sc);
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sc->sc_intr8 = 0;
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sc->sc_intr16 = 0;
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sc->sc_intrm = 0;
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sbdsp_haltdma(sc);
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sc->sc_open = SB_CLOSED;
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DPRINTF(("sbdsp_close: closed\n"));
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}
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@ -924,14 +920,7 @@ sbdsp_reset(sc)
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sc->sc_intr8 = 0;
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sc->sc_intr16 = 0;
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if (sc->sc_i.run != SB_NOTRUNNING) {
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isa_dmaabort(sc->sc_ic, sc->sc_i.dmachan);
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sc->sc_i.run = SB_NOTRUNNING;
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}
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if (sc->sc_o.run != SB_NOTRUNNING) {
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isa_dmaabort(sc->sc_ic, sc->sc_o.dmachan);
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sc->sc_o.run = SB_NOTRUNNING;
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}
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sc->sc_intrm = 0;
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/*
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* See SBK, section 11.3.
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@ -1119,21 +1108,6 @@ sbversion(sc)
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}
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}
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/*
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* Halt a DMA in progress.
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*/
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int
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sbdsp_haltdma(addr)
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void *addr;
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{
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struct sbdsp_softc *sc = addr;
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DPRINTF(("sbdsp_haltdma: sc=%p\n", sc));
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sbdsp_reset(sc);
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return 0;
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}
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int
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sbdsp_set_timeconst(sc, tc)
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struct sbdsp_softc *sc;
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@ -1181,6 +1155,8 @@ sbdsp_trigger_input(addr, start, end, blksize, intr, arg, param)
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DPRINTF(("stereo record odd bytes (%d)\n", blksize));
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return (EIO);
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}
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if (sc->sc_i.run != SB_NOTRUNNING)
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printf("sbdsp_trigger_input: already running\n");
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#endif
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sc->sc_intrr = intr;
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@ -1316,6 +1292,8 @@ sbdsp_trigger_output(addr, start, end, blksize, intr, arg, param)
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DPRINTF(("stereo playback odd bytes (%d)\n", blksize));
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return (EIO);
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}
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if (sc->sc_o.run != SB_NOTRUNNING)
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printf("sbdsp_trigger_output: already running\n");
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#endif
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sc->sc_intrp = intr;
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@ -1433,6 +1411,38 @@ sbdsp_block_output(addr)
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return (0);
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}
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int
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sbdsp_halt_output(addr)
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void *addr;
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{
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struct sbdsp_softc *sc = addr;
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if (sc->sc_o.run != SB_NOTRUNNING) {
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if (sbdsp_wdsp(sc, sc->sc_o.modep->halt) < 0)
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printf("sbdsp_halt_output: failed to halt\n");
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isa_dmaabort(sc->sc_ic, sc->sc_o.dmachan);
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sc->sc_o.run = SB_NOTRUNNING;
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}
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return (0);
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}
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int
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sbdsp_halt_input(addr)
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void *addr;
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{
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struct sbdsp_softc *sc = addr;
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if (sc->sc_i.run != SB_NOTRUNNING) {
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if (sbdsp_wdsp(sc, sc->sc_i.modep->halt) < 0)
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printf("sbdsp_halt_input: failed to halt\n");
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isa_dmaabort(sc->sc_ic, sc->sc_i.dmachan);
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sc->sc_i.run = SB_NOTRUNNING;
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}
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return (0);
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}
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/*
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* Only the DSP unit on the sound blaster generates interrupts.
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* There are three cases of interrupt: reception of a midi byte
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@ -2289,8 +2299,9 @@ sbdsp_midi_close(addr)
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if (sc->sc_model >= SB_20)
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sbdsp_reset(sc); /* exit UART mode */
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sc->sc_open = SB_CLOSED;
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sc->sc_intrm = 0;
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sc->sc_open = SB_CLOSED;
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}
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int
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@ -1,4 +1,4 @@
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/* $NetBSD: sbdspvar.h,v 1.38 1999/02/17 02:37:42 mycroft Exp $ */
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/* $NetBSD: sbdspvar.h,v 1.39 1999/02/18 07:08:36 mycroft Exp $ */
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/*
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* Copyright (c) 1991-1993 Regents of the University of California.
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@ -211,8 +211,8 @@ int sbdsp_trigger_output __P((void *, void *, void *, int, void (*)(void *),
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void *, struct audio_params *));
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int sbdsp_trigger_input __P((void *, void *, void *, int, void (*)(void *),
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void *, struct audio_params *));
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int sbdsp_haltdma __P((void *));
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int sbdsp_halt_output __P((void *));
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int sbdsp_halt_input __P((void *));
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void sbdsp_compress __P((int, u_char *, int));
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void sbdsp_expand __P((int, u_char *, int));
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@ -1,4 +1,4 @@
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/* $NetBSD: sbreg.h,v 1.26 1998/08/17 21:16:15 augustss Exp $ */
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/* $NetBSD: sbreg.h,v 1.27 1999/02/18 07:08:36 mycroft Exp $ */
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/*
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* Copyright (c) 1991-1993 Regents of the University of California.
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@ -212,10 +212,12 @@
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#define SB_DSP16_RDMA_16 0xBE /* begin 16-bit linear input */
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#define SB_DSP16_WDMA_8 0xC6 /* begin 8-bit linear output */
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#define SB_DSP16_RDMA_8 0xCE /* begin 8-bit linear input */
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#define SB_DSP_HALT 0xd0 /* temporarilty suspend DMA */
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#define SB_DSP_HALT 0xd0 /* suspend 8-bit DMA */
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#define SB_DSP_SPKR_ON 0xd1 /* turn speaker on */
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#define SB_DSP_SPKR_OFF 0xd3 /* turn speaker off */
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#define SB_DSP_CONT 0xd4 /* continue suspended DMA */
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#define SB_DSP_CONT 0xd4 /* continue 8-bit DMA */
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#define SB_DSP16_HALT 0xd5 /* suspend 16-bit DMA */
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#define SB_DSP16_CONT 0xd6 /* continue 16-bit DMA */
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#define SB_DSP_RD_SPKR 0xd8 /* get speaker status */
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#define SB_SPKR_OFF 0x00
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#define SB_SPKR_ON 0xff
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