Add rudimentary 80C04 support (basically saying "Oh look, an 80C04!").
Move printing the initial ":" into the board driver, like i82586.c does. Don't bother printing the amount of RAM, as it's always 64 KB.
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bjh21
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f2e9848f4a
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f3ef35c447
@ -1,4 +1,4 @@
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/* $NetBSD: if_ea.c,v 1.19 2000/09/18 20:51:15 bjh21 Exp $ */
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/* $NetBSD: if_ea.c,v 1.20 2000/09/21 22:20:39 bjh21 Exp $ */
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/*
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* Copyright (c) 2000 Ben Harris
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@ -38,7 +38,7 @@
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#include <sys/param.h>
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__RCSID("$NetBSD: if_ea.c,v 1.19 2000/09/18 20:51:15 bjh21 Exp $");
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__RCSID("$NetBSD: if_ea.c,v 1.20 2000/09/21 22:20:39 bjh21 Exp $");
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#include <sys/device.h>
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#include <sys/socket.h>
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@ -142,6 +142,7 @@ eaattach(struct device *parent, struct device *self, void *aux)
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}
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}
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printf(":");
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seeq8005_attach(&sc->sc_8005, myaddr);
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/* Claim a podule interrupt */
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@ -1,4 +1,4 @@
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/* $NetBSD: seeq8005.c,v 1.1 2000/09/18 20:51:15 bjh21 Exp $ */
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/* $NetBSD: seeq8005.c,v 1.2 2000/09/21 22:20:38 bjh21 Exp $ */
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/*
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* Copyright (c) 2000 Ben Harris
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@ -33,9 +33,16 @@
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* SUCH DAMAGE.
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*/
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/*
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* SEEQ 8005 device driver
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* seeq8005.c - SEEQ 8005 device driver
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*/
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/*
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* This driver currently supports the following chip:
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* SEEQ 8005 Advanced Ethernet Data Link Controller
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*/
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/*
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* This driver is based on the arm32 ea(4) driver, hence the names of many
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* of the functions.
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*/
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/*
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* Bugs/possible improvements:
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* - Does not currently support DMA
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@ -51,7 +58,7 @@
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#include <sys/types.h>
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#include <sys/param.h>
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__RCSID("$NetBSD: seeq8005.c,v 1.1 2000/09/18 20:51:15 bjh21 Exp $");
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__RCSID("$NetBSD: seeq8005.c,v 1.2 2000/09/21 22:20:38 bjh21 Exp $");
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#include <sys/systm.h>
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#include <sys/endian.h>
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@ -193,10 +200,21 @@ void
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seeq8005_attach(struct seeq8005_softc *sc, const u_int8_t *myaddr)
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{
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struct ifnet *ifp = &sc->sc_ethercom.ec_if;
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u_int id;
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/* Print out some information for the user. */
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printf(" address %s", ether_sprintf(myaddr));
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printf(": address %s", ether_sprintf(myaddr));
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/* Get the product ID */
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, EA_8005_CONFIG1,
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EA_BUFCODE_PRODUCTID);
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id = bus_space_read_2(sc->sc_iot, sc->sc_ioh, EA_8005_BUFWIN);
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if ((id & 0xf0) == 0xa0) {
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sc->sc_flags |= SEEQ8005_80C04;
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printf(", SEEQ 80C04 rev %02x", id);
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} else
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printf(", SEEQ 8005");
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/* Stop the board. */
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@ -224,11 +242,10 @@ seeq8005_attach(struct seeq8005_softc *sc, const u_int8_t *myaddr)
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bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
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#endif
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/* Should test the RAM */
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ea_ramtest(sc);
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printf("\n");
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/* Test the RAM */
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ea_ramtest(sc);
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}
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@ -243,7 +260,6 @@ ea_ramtest(struct seeq8005_softc *sc)
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bus_space_handle_t ioh = sc->sc_ioh;
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int loop;
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u_int sum = 0;
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char pbuf[9];
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/* dprintf(("ea_ramtest()\n"));*/
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@ -335,11 +351,9 @@ ea_ramtest(struct seeq8005_softc *sc)
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/* Report */
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if (sum == 0) {
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format_bytes(pbuf, sizeof(pbuf), EA_BUFFER_SIZE);
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printf(", %s buffer RAM", pbuf);
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} else
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printf(", buffer RAM failed self test, %d faults", sum);
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if (sum > 0)
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printf("%s: buffer RAM failed self test, %d faults\n",
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sc->sc_dev.dv_xname, sum);
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: seeq8005reg.h,v 1.1 2000/09/18 20:51:15 bjh21 Exp $ */
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/* $NetBSD: seeq8005reg.h,v 1.2 2000/09/21 22:20:38 bjh21 Exp $ */
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/*
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* Copyright (c) 1995 Mark Brinicombe
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@ -48,7 +48,7 @@
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#define EA_8005_TX_PTR 0xc
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#define EA_8005_DMA_ADDR 0xe
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#define EA_CMD_DMA_INTEN (1 << 0)
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#define EA_CMD_DMA_INTEN (1 << 0) /* s/DMA/TEST/ on 80C04? */
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#define EA_CMD_RX_INTEN (1 << 1)
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#define EA_CMD_TX_INTEN (1 << 2)
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#define EA_CMD_BW_INTEN (1 << 3)
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@ -65,7 +65,7 @@
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#define EA_CMD_FIFO_READ (1 << 14)
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#define EA_CMD_FIFO_WRITE (1 << 15)
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#define EA_STATUS_DMA_INT (1 << 4)
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#define EA_STATUS_DMA_INT (1 << 4) /* s/DMA/TEST/ on 80C04? */
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#define EA_STATUS_RX_INT (1 << 5)
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#define EA_STATUS_TX_INT (1 << 6)
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#define EA_STATUS_RX_ON (1 << 9)
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@ -75,33 +75,35 @@
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#define EA_STATUS_FIFO_DIR (1 << 15)
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#define EA_STATUS_FIFO_READ (1 << 15)
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#define EA_CFG1_DMA_BURST_CONT 0x00
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#define EA_CFG1_DMA_BURST_800 0x10
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#define EA_CFG1_DMA_BURST_1600 0x20
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#define EA_CFG1_DMA_BURST_3200 0x30
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#define EA_CFG1_DMA_BSIZE_1 0x00
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#define EA_CFG1_DMA_BSIZE_4 0x40
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#define EA_CFG1_DMA_BSIZE_8 0x80
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#define EA_CFG1_DMA_BSIZE_16 0xc0
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#define EA_CFG1_DMA_BURST_CONT 0x00 /* 8005 only? */
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#define EA_CFG1_DMA_BURST_800 0x10 /* 8005 only? */
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#define EA_CFG1_DMA_BURST_1600 0x20 /* 8005 only? */
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#define EA_CFG1_DMA_BURST_3200 0x30 /* 8005 only? */
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#define EA_CFG1_DMA_BSIZE_1 0x00 /* 8005 only? */
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#define EA_CFG1_DMA_BSIZE_4 0x40 /* 8005 only? */
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#define EA_CFG1_DMA_BSIZE_8 0x80 /* 8005 only? */
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#define EA_CFG1_DMA_BSIZE_16 0xc0 /* 8005 only? */
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#define EA_CFG1_STATION_ADDR0 (1 << 8)
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#define EA_CFG1_STATION_ADDR1 (1 << 9)
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#define EA_CFG1_STATION_ADDR2 (1 << 10)
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#define EA_CFG1_STATION_ADDR3 (1 << 11)
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#define EA_CFG1_STATION_ADDR4 (1 << 12)
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#define EA_CFG1_STATION_ADDR5 (1 << 13)
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#define EA_CFG1_STATION_ADDR0 (1 << 8) /* 8005 only? */
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#define EA_CFG1_STATION_ADDR1 (1 << 9) /* 8005 only? */
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#define EA_CFG1_STATION_ADDR2 (1 << 10) /* 8005 only? */
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#define EA_CFG1_STATION_ADDR3 (1 << 11) /* 8005 only? */
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#define EA_CFG1_STATION_ADDR4 (1 << 12) /* 8005 only? */
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#define EA_CFG1_STATION_ADDR5 (1 << 13) /* 8005 only? */
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#define EA_CFG1_SPECIFIC ((0 << 15) | (0 << 14))
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#define EA_CFG1_BROADCAST ((0 << 15) | (1 << 14))
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#define EA_CFG1_MULTICAST ((1 << 15) | (0 << 14))
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#define EA_CFG1_PROMISCUOUS ((1 << 15) | (1 << 14))
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#define EA_CFG2_BYTESWAP (1 << 0)
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#define EA_CFG2_REA_AUTOUPDATE (1 << 1) /* 80C04 only */
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#define EA_CFG2_RX_TX_DISABLE (1 << 2) /* 80C04 only */
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#define EA_CFG2_CRC_ERR_ENABLE (1 << 3)
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#define EA_CFG2_DRIB_ERR_ENABLE (1 << 4)
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#define EA_CFG2_PASS_SHORT (1 << 5)
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#define EA_CFG2_SLOT_SELECT (1 << 6)
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#define EA_CFG2_SLOT_SELECT (1 << 6) /* 8005 only? */
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#define EA_CFG2_PREAM_SELECT (1 << 7)
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#define EA_CFG2_ADDR_LENGTH (1 << 8)
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#define EA_CFG2_ADDR_LENGTH (1 << 8) /* 8005 only? */
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#define EA_CFG2_RX_CRC (1 << 9)
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#define EA_CFG2_NO_TX_CRC (1 << 10)
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#define EA_CFG2_LOOPBACK (1 << 11)
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@ -109,16 +111,20 @@
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#define EA_CFG2_RESET (1 << 15)
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#define EA_BUFCODE_STATION_ADDR0 0x00
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#define EA_BUFCODE_STATION_ADDR1 0x01
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#define EA_BUFCODE_STATION_ADDR2 0x02
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#define EA_BUFCODE_STATION_ADDR3 0x03
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#define EA_BUFCODE_STATION_ADDR4 0x04
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#define EA_BUFCODE_STATION_ADDR5 0x05
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#define EA_BUFCODE_STATION_ADDR1 0x01 /* 8005 only? */
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#define EA_BUFCODE_STATION_ADDR2 0x02 /* 8005 only? */
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#define EA_BUFCODE_STATION_ADDR3 0x03 /* 8005 only? */
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#define EA_BUFCODE_STATION_ADDR4 0x04 /* 8005 only? */
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#define EA_BUFCODE_STATION_ADDR5 0x05 /* 8005 only? */
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#define EA_BUFCODE_ADDRESS_PROM 0x06
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#define EA_BUFCODE_TX_EAP 0x07
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#define EA_BUFCODE_LOCAL_MEM 0x08
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#define EA_BUFCODE_INT_VECTOR 0x09
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/*#define EA_BUFCODE_MULTICAST 0x0f*/
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#define EA_BUFCODE_INT_VECTOR 0x09 /* 8005 only? */
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#define EA_BUFCODE_TX_COLLS 0x0b /* 80C04 only */
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#define EA_BUFCODE_CONFIG3 0x0c /* 80C04 only */
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#define EA_BUFCODE_PRODUCTID 0x0d /* 80C04 only */
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#define EA_BUFCODE_TESTENABLE 0x0e /* 80C04 only */
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#define EA_BUFCODE_MULTICAST 0x0f /* 80C04 only */
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#define EA_PKTHDR_TX (1 << 7)
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#define EA_PKTHDR_RX (0 << 7)
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@ -130,11 +136,14 @@
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#define EA_TXHDR_BABBLE (1 << 0)
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#define EA_TXHDR_COLLISION (1 << 1)
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#define EA_TXHDR_COLLISION16 (1 << 2)
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#define EA_TXHDR_COLLISIONMASK (0x78) /* 80C04 only */
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#define EA_TXHDR_ERROR_MASK (0x07) /* 80C04 only */
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#define EA_TXHDR_BABBLE_INT (1 << 0)
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#define EA_TXHDR_COLLISION_INT (1 << 1)
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#define EA_TXHDR_COLLISION16_INT (1 << 2)
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#define EA_TXHDR_XMIT_SUCCESS_INT (1 << 3)
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#define EB_TXHDR_SQET_TEST_INT (1 << 3) /* 80C04 only */
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#define EA_TXHDR_ERROR_MASK (0x07)
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#define EA_RXHDR_OVERSIZE (1 << 0)
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@ -1,4 +1,4 @@
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/* $NetBSD: seeq8005var.h,v 1.1 2000/09/18 20:51:15 bjh21 Exp $ */
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/* $NetBSD: seeq8005var.h,v 1.2 2000/09/21 22:20:38 bjh21 Exp $ */
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/*
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* Copyright (c) 2000 Ben Harris
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@ -42,14 +42,18 @@
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struct seeq8005_softc {
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struct device sc_dev;
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/* These fields should be initialised by the board driver. */
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bus_space_tag_t sc_iot; /* I/O base addr */
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bus_space_handle_t sc_ioh;
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/* These fields are used internally by the seeq8005 driver. */
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struct ethercom sc_ethercom; /* Ethernet common */
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int sc_config1; /* Current config1 bits */
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int sc_config2; /* Current config2 bits */
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int sc_command; /* Current command bits */
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u_int sc_rx_ptr; /* Receive buffer pointer */
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u_int sc_tx_ptr; /* Transmit buffer pointer */
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u_int sc_flags; /* Assorted flags: */
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#define SEEQ8005_80C04 0x01 /* Chip is actually an 80C04. */
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};
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extern void seeq8005_attach(struct seeq8005_softc *, const u_int8_t *);
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