From f3ef35c447a7179abece2057b2e82914deda5fac Mon Sep 17 00:00:00 2001 From: bjh21 Date: Thu, 21 Sep 2000 22:20:38 +0000 Subject: [PATCH] Add rudimentary 80C04 support (basically saying "Oh look, an 80C04!"). Move printing the initial ":" into the board driver, like i82586.c does. Don't bother printing the amount of RAM, as it's always 64 KB. --- sys/arch/arm26/podulebus/if_ea.c | 5 +-- sys/dev/ic/seeq8005.c | 48 ++++++++++++++++--------- sys/dev/ic/seeq8005reg.h | 61 ++++++++++++++++++-------------- sys/dev/ic/seeq8005var.h | 6 +++- 4 files changed, 74 insertions(+), 46 deletions(-) diff --git a/sys/arch/arm26/podulebus/if_ea.c b/sys/arch/arm26/podulebus/if_ea.c index fe4d64abf1dc..9dc2e609914a 100644 --- a/sys/arch/arm26/podulebus/if_ea.c +++ b/sys/arch/arm26/podulebus/if_ea.c @@ -1,4 +1,4 @@ -/* $NetBSD: if_ea.c,v 1.19 2000/09/18 20:51:15 bjh21 Exp $ */ +/* $NetBSD: if_ea.c,v 1.20 2000/09/21 22:20:39 bjh21 Exp $ */ /* * Copyright (c) 2000 Ben Harris @@ -38,7 +38,7 @@ #include -__RCSID("$NetBSD: if_ea.c,v 1.19 2000/09/18 20:51:15 bjh21 Exp $"); +__RCSID("$NetBSD: if_ea.c,v 1.20 2000/09/21 22:20:39 bjh21 Exp $"); #include #include @@ -142,6 +142,7 @@ eaattach(struct device *parent, struct device *self, void *aux) } } + printf(":"); seeq8005_attach(&sc->sc_8005, myaddr); /* Claim a podule interrupt */ diff --git a/sys/dev/ic/seeq8005.c b/sys/dev/ic/seeq8005.c index 131d56fa58c8..b30c1189f85e 100644 --- a/sys/dev/ic/seeq8005.c +++ b/sys/dev/ic/seeq8005.c @@ -1,4 +1,4 @@ -/* $NetBSD: seeq8005.c,v 1.1 2000/09/18 20:51:15 bjh21 Exp $ */ +/* $NetBSD: seeq8005.c,v 1.2 2000/09/21 22:20:38 bjh21 Exp $ */ /* * Copyright (c) 2000 Ben Harris @@ -33,9 +33,16 @@ * SUCH DAMAGE. */ /* - * SEEQ 8005 device driver + * seeq8005.c - SEEQ 8005 device driver + */ +/* + * This driver currently supports the following chip: + * SEEQ 8005 Advanced Ethernet Data Link Controller + */ +/* + * This driver is based on the arm32 ea(4) driver, hence the names of many + * of the functions. */ - /* * Bugs/possible improvements: * - Does not currently support DMA @@ -51,7 +58,7 @@ #include #include -__RCSID("$NetBSD: seeq8005.c,v 1.1 2000/09/18 20:51:15 bjh21 Exp $"); +__RCSID("$NetBSD: seeq8005.c,v 1.2 2000/09/21 22:20:38 bjh21 Exp $"); #include #include @@ -193,10 +200,21 @@ void seeq8005_attach(struct seeq8005_softc *sc, const u_int8_t *myaddr) { struct ifnet *ifp = &sc->sc_ethercom.ec_if; - - /* Print out some information for the user. */ + u_int id; - printf(": address %s", ether_sprintf(myaddr)); + printf(" address %s", ether_sprintf(myaddr)); + + /* Get the product ID */ + + bus_space_write_2(sc->sc_iot, sc->sc_ioh, EA_8005_CONFIG1, + EA_BUFCODE_PRODUCTID); + id = bus_space_read_2(sc->sc_iot, sc->sc_ioh, EA_8005_BUFWIN); + + if ((id & 0xf0) == 0xa0) { + sc->sc_flags |= SEEQ8005_80C04; + printf(", SEEQ 80C04 rev %02x", id); + } else + printf(", SEEQ 8005"); /* Stop the board. */ @@ -224,11 +242,10 @@ seeq8005_attach(struct seeq8005_softc *sc, const u_int8_t *myaddr) bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); #endif - /* Should test the RAM */ - - ea_ramtest(sc); - printf("\n"); + + /* Test the RAM */ + ea_ramtest(sc); } @@ -243,7 +260,6 @@ ea_ramtest(struct seeq8005_softc *sc) bus_space_handle_t ioh = sc->sc_ioh; int loop; u_int sum = 0; - char pbuf[9]; /* dprintf(("ea_ramtest()\n"));*/ @@ -335,11 +351,9 @@ ea_ramtest(struct seeq8005_softc *sc) /* Report */ - if (sum == 0) { - format_bytes(pbuf, sizeof(pbuf), EA_BUFFER_SIZE); - printf(", %s buffer RAM", pbuf); - } else - printf(", buffer RAM failed self test, %d faults", sum); + if (sum > 0) + printf("%s: buffer RAM failed self test, %d faults\n", + sc->sc_dev.dv_xname, sum); } diff --git a/sys/dev/ic/seeq8005reg.h b/sys/dev/ic/seeq8005reg.h index 61d7c2b9aaa1..f3ffe71e4ca7 100644 --- a/sys/dev/ic/seeq8005reg.h +++ b/sys/dev/ic/seeq8005reg.h @@ -1,4 +1,4 @@ -/* $NetBSD: seeq8005reg.h,v 1.1 2000/09/18 20:51:15 bjh21 Exp $ */ +/* $NetBSD: seeq8005reg.h,v 1.2 2000/09/21 22:20:38 bjh21 Exp $ */ /* * Copyright (c) 1995 Mark Brinicombe @@ -48,7 +48,7 @@ #define EA_8005_TX_PTR 0xc #define EA_8005_DMA_ADDR 0xe -#define EA_CMD_DMA_INTEN (1 << 0) +#define EA_CMD_DMA_INTEN (1 << 0) /* s/DMA/TEST/ on 80C04? */ #define EA_CMD_RX_INTEN (1 << 1) #define EA_CMD_TX_INTEN (1 << 2) #define EA_CMD_BW_INTEN (1 << 3) @@ -65,7 +65,7 @@ #define EA_CMD_FIFO_READ (1 << 14) #define EA_CMD_FIFO_WRITE (1 << 15) -#define EA_STATUS_DMA_INT (1 << 4) +#define EA_STATUS_DMA_INT (1 << 4) /* s/DMA/TEST/ on 80C04? */ #define EA_STATUS_RX_INT (1 << 5) #define EA_STATUS_TX_INT (1 << 6) #define EA_STATUS_RX_ON (1 << 9) @@ -75,33 +75,35 @@ #define EA_STATUS_FIFO_DIR (1 << 15) #define EA_STATUS_FIFO_READ (1 << 15) -#define EA_CFG1_DMA_BURST_CONT 0x00 -#define EA_CFG1_DMA_BURST_800 0x10 -#define EA_CFG1_DMA_BURST_1600 0x20 -#define EA_CFG1_DMA_BURST_3200 0x30 -#define EA_CFG1_DMA_BSIZE_1 0x00 -#define EA_CFG1_DMA_BSIZE_4 0x40 -#define EA_CFG1_DMA_BSIZE_8 0x80 -#define EA_CFG1_DMA_BSIZE_16 0xc0 +#define EA_CFG1_DMA_BURST_CONT 0x00 /* 8005 only? */ +#define EA_CFG1_DMA_BURST_800 0x10 /* 8005 only? */ +#define EA_CFG1_DMA_BURST_1600 0x20 /* 8005 only? */ +#define EA_CFG1_DMA_BURST_3200 0x30 /* 8005 only? */ +#define EA_CFG1_DMA_BSIZE_1 0x00 /* 8005 only? */ +#define EA_CFG1_DMA_BSIZE_4 0x40 /* 8005 only? */ +#define EA_CFG1_DMA_BSIZE_8 0x80 /* 8005 only? */ +#define EA_CFG1_DMA_BSIZE_16 0xc0 /* 8005 only? */ -#define EA_CFG1_STATION_ADDR0 (1 << 8) -#define EA_CFG1_STATION_ADDR1 (1 << 9) -#define EA_CFG1_STATION_ADDR2 (1 << 10) -#define EA_CFG1_STATION_ADDR3 (1 << 11) -#define EA_CFG1_STATION_ADDR4 (1 << 12) -#define EA_CFG1_STATION_ADDR5 (1 << 13) +#define EA_CFG1_STATION_ADDR0 (1 << 8) /* 8005 only? */ +#define EA_CFG1_STATION_ADDR1 (1 << 9) /* 8005 only? */ +#define EA_CFG1_STATION_ADDR2 (1 << 10) /* 8005 only? */ +#define EA_CFG1_STATION_ADDR3 (1 << 11) /* 8005 only? */ +#define EA_CFG1_STATION_ADDR4 (1 << 12) /* 8005 only? */ +#define EA_CFG1_STATION_ADDR5 (1 << 13) /* 8005 only? */ #define EA_CFG1_SPECIFIC ((0 << 15) | (0 << 14)) #define EA_CFG1_BROADCAST ((0 << 15) | (1 << 14)) #define EA_CFG1_MULTICAST ((1 << 15) | (0 << 14)) #define EA_CFG1_PROMISCUOUS ((1 << 15) | (1 << 14)) #define EA_CFG2_BYTESWAP (1 << 0) +#define EA_CFG2_REA_AUTOUPDATE (1 << 1) /* 80C04 only */ +#define EA_CFG2_RX_TX_DISABLE (1 << 2) /* 80C04 only */ #define EA_CFG2_CRC_ERR_ENABLE (1 << 3) #define EA_CFG2_DRIB_ERR_ENABLE (1 << 4) #define EA_CFG2_PASS_SHORT (1 << 5) -#define EA_CFG2_SLOT_SELECT (1 << 6) +#define EA_CFG2_SLOT_SELECT (1 << 6) /* 8005 only? */ #define EA_CFG2_PREAM_SELECT (1 << 7) -#define EA_CFG2_ADDR_LENGTH (1 << 8) +#define EA_CFG2_ADDR_LENGTH (1 << 8) /* 8005 only? */ #define EA_CFG2_RX_CRC (1 << 9) #define EA_CFG2_NO_TX_CRC (1 << 10) #define EA_CFG2_LOOPBACK (1 << 11) @@ -109,16 +111,20 @@ #define EA_CFG2_RESET (1 << 15) #define EA_BUFCODE_STATION_ADDR0 0x00 -#define EA_BUFCODE_STATION_ADDR1 0x01 -#define EA_BUFCODE_STATION_ADDR2 0x02 -#define EA_BUFCODE_STATION_ADDR3 0x03 -#define EA_BUFCODE_STATION_ADDR4 0x04 -#define EA_BUFCODE_STATION_ADDR5 0x05 +#define EA_BUFCODE_STATION_ADDR1 0x01 /* 8005 only? */ +#define EA_BUFCODE_STATION_ADDR2 0x02 /* 8005 only? */ +#define EA_BUFCODE_STATION_ADDR3 0x03 /* 8005 only? */ +#define EA_BUFCODE_STATION_ADDR4 0x04 /* 8005 only? */ +#define EA_BUFCODE_STATION_ADDR5 0x05 /* 8005 only? */ #define EA_BUFCODE_ADDRESS_PROM 0x06 #define EA_BUFCODE_TX_EAP 0x07 #define EA_BUFCODE_LOCAL_MEM 0x08 -#define EA_BUFCODE_INT_VECTOR 0x09 -/*#define EA_BUFCODE_MULTICAST 0x0f*/ +#define EA_BUFCODE_INT_VECTOR 0x09 /* 8005 only? */ +#define EA_BUFCODE_TX_COLLS 0x0b /* 80C04 only */ +#define EA_BUFCODE_CONFIG3 0x0c /* 80C04 only */ +#define EA_BUFCODE_PRODUCTID 0x0d /* 80C04 only */ +#define EA_BUFCODE_TESTENABLE 0x0e /* 80C04 only */ +#define EA_BUFCODE_MULTICAST 0x0f /* 80C04 only */ #define EA_PKTHDR_TX (1 << 7) #define EA_PKTHDR_RX (0 << 7) @@ -130,11 +136,14 @@ #define EA_TXHDR_BABBLE (1 << 0) #define EA_TXHDR_COLLISION (1 << 1) #define EA_TXHDR_COLLISION16 (1 << 2) +#define EA_TXHDR_COLLISIONMASK (0x78) /* 80C04 only */ +#define EA_TXHDR_ERROR_MASK (0x07) /* 80C04 only */ #define EA_TXHDR_BABBLE_INT (1 << 0) #define EA_TXHDR_COLLISION_INT (1 << 1) #define EA_TXHDR_COLLISION16_INT (1 << 2) #define EA_TXHDR_XMIT_SUCCESS_INT (1 << 3) +#define EB_TXHDR_SQET_TEST_INT (1 << 3) /* 80C04 only */ #define EA_TXHDR_ERROR_MASK (0x07) #define EA_RXHDR_OVERSIZE (1 << 0) diff --git a/sys/dev/ic/seeq8005var.h b/sys/dev/ic/seeq8005var.h index bd7b8b1b6006..cfee9dabb3cc 100644 --- a/sys/dev/ic/seeq8005var.h +++ b/sys/dev/ic/seeq8005var.h @@ -1,4 +1,4 @@ -/* $NetBSD: seeq8005var.h,v 1.1 2000/09/18 20:51:15 bjh21 Exp $ */ +/* $NetBSD: seeq8005var.h,v 1.2 2000/09/21 22:20:38 bjh21 Exp $ */ /* * Copyright (c) 2000 Ben Harris @@ -42,14 +42,18 @@ struct seeq8005_softc { struct device sc_dev; + /* These fields should be initialised by the board driver. */ bus_space_tag_t sc_iot; /* I/O base addr */ bus_space_handle_t sc_ioh; + /* These fields are used internally by the seeq8005 driver. */ struct ethercom sc_ethercom; /* Ethernet common */ int sc_config1; /* Current config1 bits */ int sc_config2; /* Current config2 bits */ int sc_command; /* Current command bits */ u_int sc_rx_ptr; /* Receive buffer pointer */ u_int sc_tx_ptr; /* Transmit buffer pointer */ + u_int sc_flags; /* Assorted flags: */ +#define SEEQ8005_80C04 0x01 /* Chip is actually an 80C04. */ }; extern void seeq8005_attach(struct seeq8005_softc *, const u_int8_t *);