Turn off microsparc II compatibility bit in Fujitsu turbosparc processors.
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3040e9247c
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@ -1,4 +1,4 @@
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/* $NetBSD: cache.c,v 1.30 1997/07/06 21:18:28 pk Exp $ */
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/* $NetBSD: cache.c,v 1.31 1997/07/06 22:23:38 pk Exp $ */
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/*
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* Copyright (c) 1996
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@ -252,7 +252,7 @@ cypress_cache_enable()
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void
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turbosparc_cache_enable()
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{
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int pcr;
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int pcr, pcf;
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cache_alias_dist = max(
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CACHEINFO.ic_totalsize / CACHEINFO.ic_associativity,
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@ -262,6 +262,11 @@ turbosparc_cache_enable()
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pcr = lda(SRMMU_PCR, ASI_SRMMU);
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pcr |= (TURBOSPARC_PCR_ICE | TURBOSPARC_PCR_DCE);
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sta(SRMMU_PCR, ASI_SRMMU, pcr);
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pcf = lda(SRMMU_PCFG, ASI_SRMMU);
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if (pcf & TURBOSPARC_PCFG_SNP)
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printf("DVMA coherent ");
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CACHEINFO.c_enabled = 1;
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printf("cache enabled\n");
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.c,v 1.45 1997/07/06 21:18:27 pk Exp $ */
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/* $NetBSD: cpu.c,v 1.46 1997/07/06 22:23:37 pk Exp $ */
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/*
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* Copyright (c) 1996
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@ -879,7 +879,14 @@ void
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turbosparc_hotfix(sc)
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struct cpu_softc *sc;
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{
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/* Turn off uS2 emulation bit */
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int pcf;
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pcf = lda(SRMMU_PCFG, ASI_SRMMU);
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if (pcf & TURBOSPARC_PCFG_US2) {
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/* Turn off uS2 emulation bit */
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pcf &= ~TURBOSPARC_PCFG_US2;
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sta(SRMMU_PCFG, ASI_SRMMU, pcf);
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}
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}
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#endif /* SUN4M */
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