Added two additional bits (ACON and BCON) to the initilization constant for
the CSR3. The chip now successfully reads and writes its initialization block and ring descriptors and is fully operational. (Thanks to Gordon Ross for suspecting the misconfiguration.)
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@ -1,4 +1,4 @@
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/* $NetBSD: if_le.c,v 1.1.1.1 1997/01/14 20:57:02 gwr Exp $ */
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/* $NetBSD: if_le.c,v 1.2 1997/01/17 03:42:15 jeremy Exp $ */
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/*-
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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@ -164,7 +164,7 @@ le_attach(parent, self, aux)
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sc->sc_rdcsr = lerdcsr;
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sc->sc_wrcsr = lewrcsr;
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sc->sc_hwinit = NULL;
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sc->sc_conf3 = LE_C3_BSWP;
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sc->sc_conf3 = LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON;
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am7990_config(sc);
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