From d4be114b3e5eb3052ed1e3e2c3f9d21be4eaaaef Mon Sep 17 00:00:00 2001 From: jeremy Date: Fri, 17 Jan 1997 03:42:15 +0000 Subject: [PATCH] Added two additional bits (ACON and BCON) to the initilization constant for the CSR3. The chip now successfully reads and writes its initialization block and ring descriptors and is fully operational. (Thanks to Gordon Ross for suspecting the misconfiguration.) --- sys/arch/sun3x/dev/if_le.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/arch/sun3x/dev/if_le.c b/sys/arch/sun3x/dev/if_le.c index edcdc4b90ec1..e437bda03e19 100644 --- a/sys/arch/sun3x/dev/if_le.c +++ b/sys/arch/sun3x/dev/if_le.c @@ -1,4 +1,4 @@ -/* $NetBSD: if_le.c,v 1.1.1.1 1997/01/14 20:57:02 gwr Exp $ */ +/* $NetBSD: if_le.c,v 1.2 1997/01/17 03:42:15 jeremy Exp $ */ /*- * Copyright (c) 1996 The NetBSD Foundation, Inc. @@ -164,7 +164,7 @@ le_attach(parent, self, aux) sc->sc_rdcsr = lerdcsr; sc->sc_wrcsr = lewrcsr; sc->sc_hwinit = NULL; - sc->sc_conf3 = LE_C3_BSWP; + sc->sc_conf3 = LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON; am7990_config(sc);