Add spiflash driver, and M25P instance, used for STMicro flash devices
found on Meraki Mini (for example).
This commit is contained in:
gdamore
parent
5bf8068cbb
commit
c36ea7cf37
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@ -1,4 +1,4 @@
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# $NetBSD: files.spi,v 1.1 2006/10/02 07:18:19 gdamore Exp $
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# $NetBSD: files.spi,v 1.2 2006/10/07 07:21:13 gdamore Exp $
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define spibus { }
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@ -10,6 +10,17 @@ file dev/spi/spi.c spi | spibus
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# SPI client devices
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#
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# Common SPI flash support
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define spiflashbus { }
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device spiflash: disk
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attach spiflash at spiflashbus
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file dev/spi/spiflash.c spiflash | spiflashbus
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# STMicro M25P SPI flash
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device m25p: spiflashbus
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attach m25p at spi
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file dev/spi/m25p.c m25p
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# TI TMP121 digital temperature sensor
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device tmp121temp: sysmon_envsys
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attach tmp121temp at spi
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@ -0,0 +1,206 @@
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/* $NetBSD: m25p.c,v 1.1 2006/10/07 07:21:13 gdamore Exp $ */
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/*-
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* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
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* Copyright (c) 2006 Garrett D'Amore.
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* All rights reserved.
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*
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* Portions of this code were written by Garrett D'Amore for the
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* Champaign-Urbana Community Wireless Network Project.
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* 3. All advertising materials mentioning features or use of this
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* software must display the following acknowledgements:
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* This product includes software developed by the Urbana-Champaign
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* Independent Media Center.
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* This product includes software developed by Garrett D'Amore.
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* 4. Urbana-Champaign Independent Media Center's name and Garrett
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* D'Amore's name may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
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* MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
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* MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: m25p.c,v 1.1 2006/10/07 07:21:13 gdamore Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/kernel.h>
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#include <dev/sysmon/sysmonvar.h>
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#include <dev/spi/spivar.h>
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#include <dev/spi/spiflash.h>
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/*
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* Device driver for STMicroelectronics M25P Family SPI Flash Devices
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*/
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static int m25p_match(struct device *, struct cfdata *, void *);
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static void m25p_attach(struct device *, struct device *, void *);
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static const char *m25p_getname(void *);
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static struct spi_handle *m25p_gethandle(void *);
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static int m25p_getflags(void *);
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static int m25p_getsize(void *, int);
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struct m25p_softc {
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struct device sc_dev;
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struct spi_handle *sc_sh;
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const char *sc_name;
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int sc_sizes[SPIFLASH_SIZE_COUNT];
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int sc_flags;
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};
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CFATTACH_DECL(m25p, sizeof(struct m25p_softc),
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m25p_match, m25p_attach, NULL, NULL);
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static const struct spiflash_hw_if m25p_hw_if = {
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.sf_getname = m25p_getname,
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.sf_gethandle = m25p_gethandle,
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.sf_getsize = m25p_getsize,
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.sf_getflags = m25p_getflags,
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};
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static const struct m25p_info {
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uint8_t sig;
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uint8_t mfgid;
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uint16_t devid;
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const char *name;
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uint16_t size; /* in KB */
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uint16_t sector; /* in KB */
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uint16_t mhz;
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} m25p_infos[] = {
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{ 0x16, 0x20, 0x2017, "STMicro M25P64", 8192, 64 }, /* 64Mbit */
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{ 0x12, 0x20, 0x2013, "STMicro M25P40", 512, 64 }, /* 4Mbit */
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{ 0 }
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};
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static int
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m25p_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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struct spi_attach_args *sa = aux;
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/* configure for 20MHz, which is the max for normal reads */
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if (spi_configure(sa->sa_handle, SPI_MODE_0, 20000000))
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return 0;
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return 1;
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}
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static void
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m25p_attach(struct device *parent, struct device *self, void *aux)
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{
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struct m25p_softc *sc = device_private(self);
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struct spi_attach_args *sa = aux;
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const struct m25p_info *info;
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uint8_t buf[4];
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uint8_t cmd;
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uint8_t mfgid;
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uint8_t sig;
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uint16_t devid;
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sc->sc_sh = sa->sa_handle;
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/* first we try JEDEC ID read */
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cmd = SPIFLASH_CMD_RDJI;
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if (spi_send_recv(sa->sa_handle, 1, &cmd, 3, buf)) {
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aprint_error(": failed to get JEDEC identification\n");
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return;
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}
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mfgid = buf[0];
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devid = ((uint16_t)buf[1] << 8) | buf[2];
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if ((mfgid == 0xff) || (mfgid == 0)) {
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cmd = SPIFLASH_CMD_RDID;
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if (spi_send_recv(sa->sa_handle, 1, &cmd, 4, buf)) {
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aprint_error(": failed to get legacy signature\n");
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return;
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}
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sig = buf[3];
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} else {
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sig = 0;
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}
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/* okay did it match */
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for (info = m25p_infos; info->name; info++) {
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if ((info->mfgid == mfgid) && (info->devid == devid))
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break;
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if (sig == info->sig)
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break;
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}
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if (info->name == NULL) {
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aprint_error(": unknown or unsupported device\n");
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return;
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}
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sc->sc_name = info->name;
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sc->sc_sh = sa->sa_handle;
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sc->sc_sizes[SPIFLASH_SIZE_DEVICE] = info->size * 1024;
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sc->sc_sizes[SPIFLASH_SIZE_ERASE] = info->sector * 1024;
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sc->sc_sizes[SPIFLASH_SIZE_WRITE] = 256;
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sc->sc_sizes[SPIFLASH_SIZE_READ] = -1;
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sc->sc_flags = SPIFLASH_FLAG_FAST_READ;
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printf("\n");
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spiflash_attach_mi(&m25p_hw_if, sc, self);
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}
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const char *
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m25p_getname(void *cookie)
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{
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struct m25p_softc *sc = cookie;
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return (sc->sc_name);
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}
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struct spi_handle *
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m25p_gethandle(void *cookie)
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{
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struct m25p_softc *sc = cookie;
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return (sc->sc_sh);
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}
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int
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m25p_getflags(void *cookie)
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{
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struct m25p_softc *sc = cookie;
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return (sc->sc_flags);
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}
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int
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m25p_getsize(void *cookie, int idx)
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{
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struct m25p_softc *sc = cookie;
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if ((idx < 0) || (idx >= SPIFLASH_SIZE_COUNT))
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return -1;
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return (sc->sc_sizes[idx]);
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: spi.c,v 1.1 2006/10/02 07:18:19 gdamore Exp $ */
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/* $NetBSD: spi.c,v 1.2 2006/10/07 07:21:13 gdamore Exp $ */
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/*-
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* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
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@ -42,7 +42,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: spi.c,v 1.1 2006/10/02 07:18:19 gdamore Exp $");
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__KERNEL_RCSID(0, "$NetBSD: spi.c,v 1.2 2006/10/07 07:21:13 gdamore Exp $");
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#include "locators.h"
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@ -149,6 +149,7 @@ spi_attach(struct device *parent, struct device *self, void *aux)
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M_DEVBUF, M_WAITOK | M_ZERO);
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sc->sc_speed = 0;
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sc->sc_mode = -1;
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/*
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* Initialize slave handles
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@ -0,0 +1,628 @@
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/* $NetBSD: spiflash.c,v 1.1 2006/10/07 07:21:13 gdamore Exp $ */
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/*-
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* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
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* Copyright (c) 2006 Garrett D'Amore.
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* All rights reserved.
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*
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* Portions of this code were written by Garrett D'Amore for the
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* Champaign-Urbana Community Wireless Network Project.
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above
|
||||
* copyright notice, this list of conditions and the following
|
||||
* disclaimer in the documentation and/or other materials provided
|
||||
* with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this
|
||||
* software must display the following acknowledgements:
|
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* This product includes software developed by the Urbana-Champaign
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* Independent Media Center.
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* This product includes software developed by Garrett D'Amore.
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* 4. Urbana-Champaign Independent Media Center's name and Garrett
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* D'Amore's name may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
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* MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
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||||
* MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
|
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: spiflash.c,v 1.1 2006/10/07 07:21:13 gdamore Exp $");
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#include <sys/param.h>
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#include <sys/conf.h>
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#include <sys/proc.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/kernel.h>
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#include <sys/file.h>
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#include <sys/ioctl.h>
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#include <sys/disk.h>
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#include <sys/disklabel.h>
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#include <sys/buf.h>
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#include <sys/bufq.h>
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#include <sys/uio.h>
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#include <sys/kthread.h>
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#include <sys/malloc.h>
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#include <sys/errno.h>
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#include <dev/spi/spivar.h>
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#include <dev/spi/spiflash.h>
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/*
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* This is an MI block driver for SPI flash devices. It could probably be
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* converted to some more generic framework, if someone wanted to create one
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* for NOR flashes. Note that some flashes have the ability to handle
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* interrupts.
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*/
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struct spiflash_softc {
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struct device sc_dev;
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struct disk sc_dk;
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struct spiflash_hw_if sc_hw;
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void *sc_cookie;
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const char *sc_name;
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struct spi_handle *sc_handle;
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int sc_device_size;
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int sc_write_size;
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int sc_erase_size;
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int sc_read_size;
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int sc_device_blks;
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struct bufq_state *sc_bufq;
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struct proc *sc_thread;
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};
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#define sc_getname sc_hw.sf_getname
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#define sc_gethandle sc_hw.sf_gethandle
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#define sc_getsize sc_hw.sf_getsize
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#define sc_getflags sc_hw.sf_getflags
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#define sc_erase sc_hw.sf_erase
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#define sc_write sc_hw.sf_write
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#define sc_read sc_hw.sf_read
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#define sc_getstatus sc_hw.sf_getstatus
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#define sc_setstatus sc_hw.sf_setstatus
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struct spiflash_attach_args {
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const struct spiflash_hw_if *hw;
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void *cookie;
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};
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#define STATIC
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STATIC int spiflash_match(struct device *, struct cfdata *, void *);
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STATIC void spiflash_attach(struct device *, struct device *, void *);
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STATIC int spiflash_print(void *, const char *);
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STATIC int spiflash_common_erase(spiflash_handle_t, size_t, size_t);
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STATIC int spiflash_common_write(spiflash_handle_t, size_t, size_t,
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const uint8_t *);
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STATIC int spiflash_common_read(spiflash_handle_t, size_t, size_t, uint8_t *);
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STATIC void spiflash_process(spiflash_handle_t, struct buf *);
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STATIC void spiflash_thread(void *);
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STATIC void spiflash_thread_create(void *);
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CFATTACH_DECL(spiflash, sizeof(struct spiflash_softc),
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spiflash_match, spiflash_attach, NULL, NULL);
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extern struct cfdriver spiflash_cd;
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dev_type_open(spiflash_open);
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dev_type_close(spiflash_close);
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dev_type_read(spiflash_read);
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dev_type_write(spiflash_write);
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dev_type_ioctl(spiflash_ioctl);
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dev_type_strategy(spiflash_strategy);
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const struct bdevsw spiflash_bdevsw = {
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.d_open = spiflash_open,
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.d_close = spiflash_close,
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.d_strategy = spiflash_strategy,
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.d_ioctl = spiflash_ioctl,
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.d_dump = nodump,
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.d_psize = nosize,
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.d_type = D_DISK,
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};
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const struct cdevsw spiflash_cdevsw = {
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.d_open = spiflash_open,
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.d_close = spiflash_close,
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.d_read = spiflash_read,
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.d_write = spiflash_write,
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.d_ioctl = spiflash_ioctl,
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.d_stop = nostop,
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.d_tty = notty,
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.d_poll = nopoll,
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.d_mmap = nommap,
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.d_kqfilter = nokqfilter,
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.d_type = D_DISK,
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};
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static struct dkdriver spiflash_dkdriver = { spiflash_strategy, NULL };
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spiflash_handle_t
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spiflash_attach_mi(const struct spiflash_hw_if *hw, void *cookie,
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struct device *dev)
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{
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struct spiflash_attach_args sfa;
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sfa.hw = hw;
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sfa.cookie = cookie;
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return (spiflash_handle_t)config_found(dev, &sfa, spiflash_print);
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}
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int
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spiflash_print(void *aux, const char *pnp)
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{
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if (pnp != NULL)
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printf("spiflash at %s\n", pnp);
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return UNCONF;
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}
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int
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spiflash_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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return 1;
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}
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void
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spiflash_attach(struct device *parent, struct device *self, void *aux)
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{
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struct spiflash_softc *sc = device_private(self);
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struct spiflash_attach_args *sfa = aux;
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void *cookie = sfa->cookie;
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sc->sc_hw = *sfa->hw;
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sc->sc_cookie = cookie;
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sc->sc_name = sc->sc_getname(cookie);
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sc->sc_handle = sc->sc_gethandle(cookie);
|
||||
sc->sc_device_size = sc->sc_getsize(cookie, SPIFLASH_SIZE_DEVICE);
|
||||
sc->sc_erase_size = sc->sc_getsize(cookie, SPIFLASH_SIZE_ERASE);
|
||||
sc->sc_write_size = sc->sc_getsize(cookie, SPIFLASH_SIZE_WRITE);
|
||||
sc->sc_read_size = sc->sc_getsize(cookie, SPIFLASH_SIZE_READ);
|
||||
sc->sc_device_blks = sc->sc_device_size / DEV_BSIZE;
|
||||
|
||||
if (sc->sc_read == NULL)
|
||||
sc->sc_read = spiflash_common_read;
|
||||
if (sc->sc_write == NULL)
|
||||
sc->sc_write = spiflash_common_write;
|
||||
if (sc->sc_erase == NULL)
|
||||
sc->sc_erase = spiflash_common_erase;
|
||||
|
||||
aprint_naive(": SPI flash\n");
|
||||
aprint_normal(": %s SPI flash\n", sc->sc_name);
|
||||
/* XXX: note that this has to change for boot-sectored flash */
|
||||
aprint_normal("%s: %d KB, %d sectors of %d KB each\n",
|
||||
sc->sc_dev.dv_xname, sc->sc_device_size / 1024,
|
||||
sc->sc_device_size / sc->sc_erase_size,
|
||||
sc->sc_erase_size / 1024);
|
||||
|
||||
/* first-come first-served strategy works best for us */
|
||||
bufq_alloc(&sc->sc_bufq, "fcfs", BUFQ_SORT_RAWBLOCK);
|
||||
|
||||
/* arrange to allocate the kthread */
|
||||
kthread_create(spiflash_thread_create, sc);
|
||||
|
||||
sc->sc_dk.dk_driver = &spiflash_dkdriver;
|
||||
sc->sc_dk.dk_name = sc->sc_dev.dv_xname;
|
||||
|
||||
disk_attach(&sc->sc_dk);
|
||||
}
|
||||
|
||||
int
|
||||
spiflash_open(dev_t dev, int flags, int mode, struct lwp *l)
|
||||
{
|
||||
spiflash_handle_t sc;
|
||||
|
||||
if ((sc = device_lookup(&spiflash_cd, DISKUNIT(dev))) == NULL)
|
||||
return ENXIO;
|
||||
|
||||
/*
|
||||
* XXX: We need to handle partitions here. The problem is
|
||||
* that it isn't entirely clear to me how to deal with this.
|
||||
* There are devices that could be used "in the raw" with a
|
||||
* NetBSD label, but then you get into devices that have other
|
||||
* kinds of data on them -- some have VxWorks data, some have
|
||||
* RedBoot data, and some have other contraints -- for example
|
||||
* some devices might have a portion that is read-only,
|
||||
* whereas others might have a portion that is read-write.
|
||||
*
|
||||
* For now we just permit access to the entire device.
|
||||
*/
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
spiflash_close(dev_t dev, int flags, int mode, struct lwp *l)
|
||||
{
|
||||
spiflash_handle_t sc;
|
||||
|
||||
if ((sc = device_lookup(&spiflash_cd, DISKUNIT(dev))) == NULL)
|
||||
return ENXIO;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
spiflash_read(dev_t dev, struct uio *uio, int ioflag)
|
||||
{
|
||||
|
||||
return physio(spiflash_strategy, NULL, dev, B_READ, minphys, uio);
|
||||
}
|
||||
|
||||
int
|
||||
spiflash_write(dev_t dev, struct uio *uio, int ioflag)
|
||||
{
|
||||
|
||||
return physio(spiflash_strategy, NULL, dev, B_WRITE, minphys, uio);
|
||||
}
|
||||
|
||||
int
|
||||
spiflash_ioctl(dev_t dev, u_long cmd, caddr_t data, int flags, struct lwp *l)
|
||||
{
|
||||
spiflash_handle_t sc;
|
||||
|
||||
if ((sc = device_lookup(&spiflash_cd, DISKUNIT(dev))) == NULL)
|
||||
return ENXIO;
|
||||
|
||||
return EINVAL;
|
||||
}
|
||||
|
||||
void
|
||||
spiflash_strategy(struct buf *bp)
|
||||
{
|
||||
spiflash_handle_t sc;
|
||||
int sz;
|
||||
int s;
|
||||
|
||||
sc = device_lookup(&spiflash_cd, DISKUNIT(bp->b_dev));
|
||||
if (sc == NULL) {
|
||||
bp->b_error = ENXIO;
|
||||
bp->b_flags |= B_ERROR;
|
||||
biodone(bp);
|
||||
return;
|
||||
}
|
||||
|
||||
if ((bp->b_bcount % sc->sc_write_size) ||
|
||||
(bp->b_blkno < 0)) {
|
||||
bp->b_error = EINVAL;
|
||||
bp->b_flags |= B_ERROR;
|
||||
biodone(bp);
|
||||
return;
|
||||
}
|
||||
|
||||
/* no work? */
|
||||
if (bp->b_bcount == 0) {
|
||||
biodone(bp);
|
||||
return;
|
||||
}
|
||||
|
||||
sz = bp->b_bcount / DEV_BSIZE;
|
||||
|
||||
if ((bp->b_blkno + sz) > sc->sc_device_blks) {
|
||||
sz = sc->sc_device_blks - bp->b_blkno;
|
||||
/* exactly at end of media? return EOF */
|
||||
if (sz == 0) {
|
||||
biodone(bp);
|
||||
return;
|
||||
}
|
||||
if (sz < 0) {
|
||||
/* past end of disk */
|
||||
bp->b_error = EINVAL;
|
||||
bp->b_flags |= B_ERROR;
|
||||
biodone(bp);
|
||||
}
|
||||
/* otherwise truncate it */
|
||||
bp->b_bcount = sz << DEV_BSHIFT;
|
||||
}
|
||||
|
||||
bp->b_resid = bp->b_bcount;
|
||||
|
||||
/* all ready, hand off to thread for async processing */
|
||||
s = splbio();
|
||||
BUFQ_PUT(sc->sc_bufq, bp);
|
||||
wakeup(&sc->sc_thread);
|
||||
splx(s);
|
||||
}
|
||||
|
||||
void
|
||||
spiflash_process(spiflash_handle_t sc, struct buf *bp)
|
||||
{
|
||||
int cnt;
|
||||
size_t addr;
|
||||
uint8_t *data;
|
||||
|
||||
addr = bp->b_blkno * DEV_BSIZE;
|
||||
data = bp->b_data;
|
||||
|
||||
while (bp->b_resid > 0) {
|
||||
cnt = max(sc->sc_write_size, DEV_BSIZE);
|
||||
if (bp->b_flags & B_READ) {
|
||||
bp->b_error = sc->sc_read(sc, addr, cnt, data);
|
||||
} else {
|
||||
bp->b_error = sc->sc_write(sc, addr, cnt, data);
|
||||
}
|
||||
if (bp->b_error) {
|
||||
bp->b_flags |= B_ERROR;
|
||||
biodone(bp);
|
||||
return;
|
||||
}
|
||||
bp->b_resid -= cnt;
|
||||
data += cnt;
|
||||
addr += cnt;
|
||||
}
|
||||
biodone(bp);
|
||||
}
|
||||
|
||||
void
|
||||
spiflash_thread(void *arg)
|
||||
{
|
||||
spiflash_handle_t sc = arg;
|
||||
struct buf *bp;
|
||||
int s;
|
||||
|
||||
s = splbio();
|
||||
for (;;) {
|
||||
if ((bp = BUFQ_GET(sc->sc_bufq)) == NULL) {
|
||||
tsleep(&sc->sc_thread, PRIBIO, "spiflash_thread", 0);
|
||||
continue;
|
||||
}
|
||||
|
||||
spiflash_process(sc, bp);
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
spiflash_thread_create(void *arg)
|
||||
{
|
||||
spiflash_handle_t sc = arg;
|
||||
|
||||
kthread_create1(spiflash_thread, arg, &sc->sc_thread,
|
||||
"spiflash_thread");
|
||||
}
|
||||
|
||||
/*
|
||||
* SPI flash common implementation.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Most devices take on the order of 1 second for each block that they
|
||||
* delete.
|
||||
*/
|
||||
int
|
||||
spiflash_common_erase(spiflash_handle_t sc, size_t start, size_t size)
|
||||
{
|
||||
int rv;
|
||||
|
||||
if ((start % sc->sc_erase_size) || (size % sc->sc_erase_size))
|
||||
return EINVAL;
|
||||
|
||||
/* the second test is to test against wrap */
|
||||
if ((start > sc->sc_device_size) ||
|
||||
((start + size) > sc->sc_device_size))
|
||||
return EINVAL;
|
||||
|
||||
/*
|
||||
* XXX: check protection status? Requires master table mapping
|
||||
* sectors to status bits, and so forth.
|
||||
*/
|
||||
|
||||
while (size) {
|
||||
if ((rv = spiflash_write_enable(sc)) != 0) {
|
||||
spiflash_write_disable(sc);
|
||||
return rv;
|
||||
}
|
||||
if ((rv = spiflash_cmd(sc, SPIFLASH_CMD_ERASE, 3, start, 0,
|
||||
NULL, NULL)) != 0) {
|
||||
spiflash_write_disable(sc);
|
||||
return rv;
|
||||
}
|
||||
|
||||
/*
|
||||
* The devices I have all say typical for sector erase
|
||||
* is ~1sec. We check ten times that often. (There
|
||||
* is no way to interrupt on this.)
|
||||
*/
|
||||
if ((rv = spiflash_wait(sc, hz / 10)) != 0)
|
||||
return rv;
|
||||
|
||||
start += sc->sc_erase_size;
|
||||
size -= sc->sc_erase_size;
|
||||
|
||||
/* NB: according to the docs I have, the write enable
|
||||
* is automatically cleared upon completion of an erase
|
||||
* command, so there is no need to explicitly disable it.
|
||||
*/
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
spiflash_common_write(spiflash_handle_t sc, size_t start, size_t size,
|
||||
const uint8_t *data)
|
||||
{
|
||||
int rv;
|
||||
|
||||
if ((start % sc->sc_write_size) || (size % sc->sc_write_size))
|
||||
return EINVAL;
|
||||
|
||||
/* the second test is to test against wrap */
|
||||
if ((start > sc->sc_device_size) ||
|
||||
((start + size) > sc->sc_device_size))
|
||||
return EINVAL;
|
||||
|
||||
while (size) {
|
||||
int cnt;
|
||||
|
||||
if ((rv = spiflash_write_enable(sc)) != 0) {
|
||||
spiflash_write_disable(sc);
|
||||
return rv;
|
||||
}
|
||||
|
||||
cnt = min(size, sc->sc_write_size);
|
||||
if ((rv = spiflash_cmd(sc, SPIFLASH_CMD_PROGRAM, 3, start,
|
||||
cnt, data, NULL)) != 0) {
|
||||
spiflash_write_disable(sc);
|
||||
return rv;
|
||||
}
|
||||
|
||||
/*
|
||||
* It seems that most devices can write bits fairly
|
||||
* quickly. For example, one part I have access to
|
||||
* takes ~5msec to process the entire 256 byte page.
|
||||
* Probably this should be modified to cope with
|
||||
* device-specific timing, and maybe also take into
|
||||
* account systems with higher values of HZ (which
|
||||
* could benefit from sleeping.)
|
||||
*/
|
||||
if ((rv = spiflash_wait(sc, 0)) != 0)
|
||||
return rv;
|
||||
|
||||
start += cnt;
|
||||
size -= cnt;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
spiflash_common_read(spiflash_handle_t sc, size_t start, size_t size,
|
||||
uint8_t *data)
|
||||
{
|
||||
int rv;
|
||||
int align;
|
||||
|
||||
align = sc->sc_write_size;
|
||||
if (sc->sc_read_size > 0)
|
||||
align = sc->sc_read_size;
|
||||
|
||||
if ((start % align) || (size % align))
|
||||
return EINVAL;
|
||||
|
||||
/* the second test is to test against wrap */
|
||||
if ((start > sc->sc_device_size) ||
|
||||
((start + size) > sc->sc_device_size))
|
||||
return EINVAL;
|
||||
|
||||
while (size) {
|
||||
int cnt;
|
||||
|
||||
if ((rv = spiflash_write_enable(sc)) != 0) {
|
||||
spiflash_write_disable(sc);
|
||||
return rv;
|
||||
}
|
||||
|
||||
if (sc->sc_read_size > 0)
|
||||
cnt = min(size, sc->sc_read_size);
|
||||
else
|
||||
cnt = size;
|
||||
|
||||
if ((rv = spiflash_cmd(sc, SPIFLASH_CMD_READ, 3, start,
|
||||
cnt, NULL, data)) != 0) {
|
||||
spiflash_write_disable(sc);
|
||||
return rv;
|
||||
}
|
||||
|
||||
start += cnt;
|
||||
size -= cnt;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* read status register */
|
||||
int
|
||||
spiflash_read_status(spiflash_handle_t sc, uint8_t *sr)
|
||||
{
|
||||
|
||||
return spiflash_cmd(sc, SPIFLASH_CMD_RDSR, 0, 0, 1, NULL, sr);
|
||||
}
|
||||
|
||||
int
|
||||
spiflash_write_enable(spiflash_handle_t sc)
|
||||
{
|
||||
|
||||
return spiflash_cmd(sc, SPIFLASH_CMD_WREN, 0, 0, 0, NULL, NULL);
|
||||
}
|
||||
|
||||
int
|
||||
spiflash_write_disable(spiflash_handle_t sc)
|
||||
{
|
||||
|
||||
return spiflash_cmd(sc, SPIFLASH_CMD_WRDI, 0, 0, 0, NULL, NULL);
|
||||
}
|
||||
|
||||
int
|
||||
spiflash_cmd(spiflash_handle_t sc, uint8_t cmd,
|
||||
size_t addrlen, uint32_t addr,
|
||||
size_t cnt, const uint8_t *wdata, uint8_t *rdata)
|
||||
{
|
||||
struct spi_transfer trans;
|
||||
struct spi_chunk chunk1, chunk2;
|
||||
char buf[4];
|
||||
int i;
|
||||
|
||||
buf[0] = cmd;
|
||||
|
||||
if (addrlen > 3)
|
||||
return EINVAL;
|
||||
|
||||
for (i = addrlen; i > 0; i--) {
|
||||
buf[i] = (addr >> ((i - 1) * 8)) & 0xff;
|
||||
}
|
||||
spi_transfer_init(&trans);
|
||||
spi_chunk_init(&chunk1, addrlen + 1, buf, NULL);
|
||||
spi_transfer_add(&trans, &chunk1);
|
||||
if (cnt) {
|
||||
spi_chunk_init(&chunk2, cnt, wdata, rdata);
|
||||
spi_transfer_add(&trans, &chunk2);
|
||||
}
|
||||
|
||||
spi_transfer(sc->sc_handle, &trans);
|
||||
spi_wait(&trans);
|
||||
|
||||
if (trans.st_flags & SPI_F_ERROR)
|
||||
return trans.st_errno;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
spiflash_wait(spiflash_handle_t sc, int tmo)
|
||||
{
|
||||
int rv;
|
||||
uint8_t sr;
|
||||
|
||||
for (;;) {
|
||||
if ((rv = spiflash_read_status(sc, &sr)) != 0)
|
||||
return rv;
|
||||
|
||||
if ((sr & SPIFLASH_SR_BUSY) == 0)
|
||||
break;
|
||||
/*
|
||||
* The devices I have all say typical for sector
|
||||
* erase is ~1sec. We check time times that often.
|
||||
* (There is no way to interrupt on this.)
|
||||
*/
|
||||
if (tmo)
|
||||
tsleep(&sr, PWAIT, "spiflash_wait", tmo);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,153 @@
|
|||
/* $NetBSD: spiflash.h,v 1.1 2006/10/07 07:21:13 gdamore Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
|
||||
* Copyright (c) 2006 Garrett D'Amore.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Portions of this code were written by Garrett D'Amore for the
|
||||
* Champaign-Urbana Community Wireless Network Project.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or
|
||||
* without modification, are permitted provided that the following
|
||||
* conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above
|
||||
* copyright notice, this list of conditions and the following
|
||||
* disclaimer in the documentation and/or other materials provided
|
||||
* with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this
|
||||
* software must display the following acknowledgements:
|
||||
* This product includes software developed by the Urbana-Champaign
|
||||
* Independent Media Center.
|
||||
* This product includes software developed by Garrett D'Amore.
|
||||
* 4. Urbana-Champaign Independent Media Center's name and Garrett
|
||||
* D'Amore's name may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
|
||||
* MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
|
||||
* MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
|
||||
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _DEV_SPI_SPIFLASH_H_
|
||||
#define _DEV_SPI_SPIFLASH_H_
|
||||
|
||||
#define SPIFLASH_CMD_RDSR 0x05 /* read status register */
|
||||
#define SPIFLASH_CMD_WRSR 0x01 /* write status register */
|
||||
#define SPIFLASH_CMD_WREN 0x06 /* enable WRSR */
|
||||
#define SPIFLASH_CMD_WRDI 0x04 /* disable WRSR */
|
||||
|
||||
/*
|
||||
* Different chips offer different ways to read a device ID, although
|
||||
* newer parts should all offer the standard JEDEC variant.
|
||||
* Additionally, many parts have a faster read, though how to make use
|
||||
* of this sometimes requires special hacks. E.g. some parts use an
|
||||
* extra data pin, and some crank the clock rate up.
|
||||
*/
|
||||
#define SPIFLASH_CMD_READ 0x03 /* read data (normal) */
|
||||
#define SPIFLASH_CMD_RDID 0xab /* read id */
|
||||
#define SPIFLASH_CMD_RDID2 0x90 /* read id (alternate) */
|
||||
#define SPIFLASH_CMD_RDJI 0x9f /* read JEDEC id */
|
||||
#define SPIFLASH_CMD_READFAST 0x0b /* fast read */
|
||||
|
||||
/*
|
||||
* Different chips offer different variations on the sector erase.
|
||||
* E.g. SST parts offer 4k, 32k, and 64k erase sizes on the same part,
|
||||
* with just different cmds. However, at least SST, AMD, and Winbond
|
||||
* all offer at least the main (0xd8) variant.
|
||||
*/
|
||||
#define SPIFLASH_CMD_ERASE 0xd8 /* sector erase */
|
||||
#define SPIFLASH_CMD_ERASE2 0x52 /* sector erase (alternate) */
|
||||
#define SPIFLASH_CMD_ERASE3 0x20 /* sector erase (alternate) */
|
||||
#define SPIFLASH_CMD_ERASE4 0x81 /* page erase */
|
||||
#define SPIFLASH_CMD_CHIPERASE 0xc7 /* chip erase */
|
||||
|
||||
/*
|
||||
* Some parts can stream bytes with the program command, whereas others require
|
||||
* a seperate command sequence for each byte.
|
||||
*/
|
||||
#define SPIFLASH_CMD_PROGRAM 0x02 /* page or byte program */
|
||||
#define SPIFLASH_CMD_PROGRAM_AA 0xad /* program (autoincrement) */
|
||||
|
||||
/*
|
||||
* Some additional commands. Again, mostly device specific.
|
||||
*/
|
||||
#define SPIFLASH_CMD_EBSY 0x70 /* output busy signal (SST) */
|
||||
#define SPIFLASH_CMD_DBSY 0x80 /* disable busy signal (SST) */
|
||||
|
||||
/*
|
||||
* Status register bits. Not all devices implement all bits. In
|
||||
* addition, the meanings of the BP bits seem to vary from device to
|
||||
* device.
|
||||
*/
|
||||
#define SPIFLASH_SR_BUSY 0x01 /* program in progress */
|
||||
#define SPIFLASH_SR_WEL 0x02 /* write enable latch */
|
||||
#define SPIFLASH_SR_BP0 0x04 /* block protect bits */
|
||||
#define SPIFLASH_SR_BP1 0x08
|
||||
#define SPIFLASH_SR_BP2 0x10
|
||||
#define SPIFLASH_SR_BP3 0x20
|
||||
#define SPIFLASH_SR_AAI 0x40 /* auto-increment mode */
|
||||
#define SPIFLASH_SR_SRP 0x80 /* SR write protected */
|
||||
|
||||
/*
|
||||
* This needs to change to accomodate boot-sectored devices.
|
||||
*/
|
||||
|
||||
typedef struct spiflash_softc *spiflash_handle_t;
|
||||
|
||||
struct spiflash_hw_if {
|
||||
/*
|
||||
* Driver MUST provide these.
|
||||
*/
|
||||
const char *(*sf_getname)(void *);
|
||||
struct spi_handle *(*sf_gethandle)(void *);
|
||||
int (*sf_getflags)(void *);
|
||||
int (*sf_getsize)(void *, int);
|
||||
|
||||
/*
|
||||
* SPI framework will provide these if the driver does not.
|
||||
*/
|
||||
int (*sf_erase)(spiflash_handle_t, size_t, size_t);
|
||||
int (*sf_write)(spiflash_handle_t, size_t, size_t,
|
||||
const uint8_t *);
|
||||
int (*sf_read)(spiflash_handle_t, size_t, size_t, uint8_t *);
|
||||
/*
|
||||
* Not implemented yet.
|
||||
*/
|
||||
int (*sf_getstatus)(spiflash_handle_t, int, int);
|
||||
int (*sf_setstatus)(spiflash_handle_t, int, int, int);
|
||||
};
|
||||
|
||||
#define SPIFLASH_SIZE_DEVICE 0
|
||||
#define SPIFLASH_SIZE_ERASE 1
|
||||
#define SPIFLASH_SIZE_WRITE 2 /* return -1 for unlimited */
|
||||
#define SPIFLASH_SIZE_READ 3 /* return -1 for unlimited */
|
||||
#define SPIFLASH_SIZE_COUNT 4
|
||||
|
||||
#define SPIFLASH_FLAG_FAST_READ 0x0004 /* use fast read sequence */
|
||||
|
||||
spiflash_handle_t spiflash_attach_mi(const struct spiflash_hw_if *, void *,
|
||||
struct device *);
|
||||
void spiflash_set_private(spiflash_handle_t, void *);
|
||||
void *spiflash_get_private(spiflash_handle_t);
|
||||
int spiflash_read_status(spiflash_handle_t, uint8_t *);
|
||||
int spiflash_write_disable(spiflash_handle_t);
|
||||
int spiflash_write_enable(spiflash_handle_t);
|
||||
int spiflash_cmd(spiflash_handle_t, uint8_t, size_t, uint32_t, size_t,
|
||||
const uint8_t *, uint8_t *);
|
||||
int spiflash_wait(spiflash_handle_t, int);
|
||||
|
||||
|
||||
#endif /* _DEV_SPI_SPIFLASH_H_ */
|
||||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: spivar.h,v 1.1 2006/10/02 07:18:19 gdamore Exp $ */
|
||||
/* $NetBSD: spivar.h,v 1.2 2006/10/07 07:21:13 gdamore Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
|
||||
|
|
@ -109,11 +109,15 @@ struct spi_transfer {
|
|||
void *st_private;
|
||||
void (*st_done)(struct spi_transfer *);
|
||||
struct simplelock st_lock;
|
||||
void *st_busprivate;
|
||||
};
|
||||
|
||||
/* declare a list of transfers */
|
||||
SIMPLEQ_HEAD(spi_transq, spi_transfer);
|
||||
|
||||
#define spi_transq_init(q) \
|
||||
SIMPLEQ_INIT(q)
|
||||
|
||||
#define spi_transq_enqueue(q, trans) \
|
||||
SIMPLEQ_INSERT_TAIL(q, trans, st_chain)
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue