Add Atheros SPI controller. This is a "pseudo-controller", as it has some
artificial limitations which really only make it good for use with serial flash devices. One of the more annoying limitations is a restriction that it can only transfer 8 bytes at a time. (4 command/address, plus 4 data.) The driver includes design to work around those limitations, but these changes are only appropriate for serial flash devices. This driver is designed to run in interrupt driven mode, but due to lack of adequate documentation, we run it in polled mode. A subsequent commit will introduce the MI M25P flash driver, which has been tested and is known to function somewhat reasonably..
This commit is contained in:
gdamore
parent
89f8748c35
commit
5bf8068cbb
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@ -1,4 +1,4 @@
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/* $NetBSD: ar5315.c,v 1.2 2006/09/26 17:09:32 gdamore Exp $ */
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/* $NetBSD: ar5315.c,v 1.3 2006/10/07 07:18:02 gdamore Exp $ */
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/*
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* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
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@ -48,7 +48,7 @@
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* family.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ar5315.c,v 1.2 2006/09/26 17:09:32 gdamore Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ar5315.c,v 1.3 2006/10/07 07:18:02 gdamore Exp $");
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#include "opt_ddb.h"
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#include "opt_kgdb.h"
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@ -346,6 +346,12 @@ ar531x_get_devices(void)
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AR5315_CPU_IRQ_WLAN, -1,
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0, 0, 0
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},
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{
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"arspi",
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AR5315_SPI_BASE, 0x10,
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AR5315_CPU_IRQ_MISC, AR5315_MISC_IRQ_SPI,
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0, 0, 0
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},
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{ NULL }
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};
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@ -0,0 +1,627 @@
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/* $NetBSD: arspi.c,v 1.1 2006/10/07 07:18:02 gdamore Exp $ */
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/*-
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* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
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* Copyright (c) 2006 Garrett D'Amore.
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* All rights reserved.
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*
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* Portions of this code were written by Garrett D'Amore for the
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* Champaign-Urbana Community Wireless Network Project.
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* 3. All advertising materials mentioning features or use of this
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* software must display the following acknowledgements:
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* This product includes software developed by the Urbana-Champaign
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* Independent Media Center.
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* This product includes software developed by Garrett D'Amore.
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* 4. Urbana-Champaign Independent Media Center's name and Garrett
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* D'Amore's name may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
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* MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
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* MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: arspi.c,v 1.1 2006/10/07 07:18:02 gdamore Exp $");
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#include "locators.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/errno.h>
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#include <sys/malloc.h>
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#include <sys/proc.h>
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#include <sys/queue.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <mips/atheros/include/ar5315reg.h>
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#include <mips/atheros/include/ar531xvar.h>
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#include <mips/atheros/include/arbusvar.h>
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#include <mips/atheros/dev/arspireg.h>
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#include <dev/spi/spiflash.h>
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#include <dev/spi/spivar.h>
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/*
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* This device is intended only to operate with specific SPI flash
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* parts, and is not a general purpose SPI host. (Or at least if it
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* is, the Linux and eCos sources do not show how to use it as such.)
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* And lack of documentation on the Atheros SoCs is less than helpful.
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*
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* So for now we just "emulate" enough of the host bus framework to
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* make the SPI flash drivers happy.
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*/
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struct arspi_job {
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uint8_t job_opcode;
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struct spi_chunk *job_chunk;
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uint32_t job_flags;
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uint32_t job_addr;
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uint32_t job_data;
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int job_rxcnt;
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int job_txcnt;
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int job_addrcnt;
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int job_rresid;
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int job_wresid;
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};
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#define JOB_READ 0x1
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#define JOB_WRITE 0x2
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#define JOB_LAST 0x4
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#define JOB_WAIT 0x8 /* job must wait for WIP bits */
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#define JOB_WREN 0x10 /* WREN needed */
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struct arspi_softc {
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struct device sc_dev;
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struct spi_controller sc_spi;
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void *sc_ih;
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boolean_t sc_interrupts;
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struct spi_transfer *sc_transfer;
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struct spi_chunk *sc_wchunk; /* for partial writes */
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struct spi_transq sc_transq;
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bus_space_tag_t sc_st;
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bus_space_handle_t sc_sh;
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bus_size_t sc_size;
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};
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#define STATIC
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STATIC int arspi_match(struct device *, struct cfdata *, void *);
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STATIC void arspi_attach(struct device *, struct device *, void *);
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STATIC void arspi_interrupts(struct device *);
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STATIC int arspi_intr(void *);
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/* SPI service routines */
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STATIC int arspi_configure(void *, int, int, int);
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STATIC int arspi_transfer(void *, struct spi_transfer *);
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/* internal support */
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STATIC void arspi_poll(struct arspi_softc *);
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STATIC void arspi_done(struct arspi_softc *, int);
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STATIC void arspi_sched(struct arspi_softc *);
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STATIC int arspi_get_byte(struct spi_chunk **, uint8_t *);
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STATIC int arspi_put_byte(struct spi_chunk **, uint8_t);
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STATIC int arspi_make_job(struct spi_transfer *);
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STATIC void arspi_update_job(struct spi_transfer *);
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STATIC void arspi_finish_job(struct spi_transfer *);
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CFATTACH_DECL(arspi, sizeof(struct arspi_softc),
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arspi_match, arspi_attach, NULL, NULL);
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#define GETREG(sc, o) bus_space_read_4(sc->sc_st, sc->sc_sh, o)
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#define PUTREG(sc, o, v) bus_space_write_4(sc->sc_st, sc->sc_sh, o, v)
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int
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arspi_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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struct arbus_attach_args *aa = aux;
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if (strcmp(aa->aa_name, cf->cf_name) != 0)
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return 0;
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return 1;
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}
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void
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arspi_attach(struct device *parent, struct device *self, void *aux)
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{
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struct arspi_softc *sc = device_private(self);
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struct spibus_attach_args sba;
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struct arbus_attach_args *aa = aux;
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/*
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* Map registers.
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*/
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sc->sc_st = aa->aa_bst;
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sc->sc_size = aa->aa_size;
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if (bus_space_map(sc->sc_st, aa->aa_addr, sc->sc_size, 0,
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&sc->sc_sh) != 0) {
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printf(": unable to map registers!\n");
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return;
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}
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aprint_normal(": Atheros SPI controller\n");
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/*
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* Initialize SPI controller.
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*/
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sc->sc_spi.sct_cookie = sc;
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sc->sc_spi.sct_configure = arspi_configure;
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sc->sc_spi.sct_transfer = arspi_transfer;
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sc->sc_spi.sct_nslaves = 1;
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/*
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* Initialize the queue.
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*/
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spi_transq_init(&sc->sc_transq);
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/*
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* Enable device interrupts.
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*/
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sc->sc_ih = arbus_intr_establish(aa->aa_cirq, aa->aa_mirq,
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arspi_intr, sc);
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if (sc->sc_ih == NULL) {
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aprint_error("%s: couldn't establish interrupt\n",
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device_xname(self));
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/* just leave it in polled mode */
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} else
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config_interrupts(self, arspi_interrupts);
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/*
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* Initialize and attach bus attach.
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*/
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sba.sba_controller = &sc->sc_spi;
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(void) config_found_ia(&sc->sc_dev, "spibus", &sba, spibus_print);
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}
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void
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arspi_interrupts(struct device *self)
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{
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/*
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* we never leave polling mode, because, apparently, we
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* are missing some data about how to drive the SPI in interrupt
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* mode.
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*/
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#if 0
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struct arspi_softc *sc = device_private(self);
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int s;
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s = splserial();
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sc->sc_interrupts = TRUE;
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splx(s);
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#endif
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}
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int
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arspi_intr(void *arg)
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{
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struct arspi_softc *sc = arg;
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while (GETREG(sc, ARSPI_REG_CTL) & ARSPI_CTL_BUSY);
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arspi_done(sc, 0);
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return 1;
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}
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void
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arspi_poll(struct arspi_softc *sc)
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{
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while (sc->sc_transfer) {
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arspi_intr(sc);
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}
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}
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int
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arspi_configure(void *cookie, int slave, int mode, int speed)
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{
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/*
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* We don't support the full SPI protocol, and hopefully the
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* firmware has programmed a reasonable mode already. So
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* just a couple of quick sanity checks, then bail.
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*/
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if ((mode != 0) || (slave != 0))
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return EINVAL;
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return 0;
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}
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int
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arspi_transfer(void *cookie, struct spi_transfer *st)
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{
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struct arspi_softc *sc = cookie;
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int rv;
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int s;
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st->st_busprivate = NULL;
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if ((rv = arspi_make_job(st)) != 0) {
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||||
if (st->st_busprivate) {
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free(st->st_busprivate, M_DEVBUF);
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st->st_busprivate = NULL;
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}
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spi_done(st, rv);
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return rv;
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||||
}
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s = splserial();
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spi_transq_enqueue(&sc->sc_transq, st);
|
||||
if (sc->sc_transfer == NULL) {
|
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arspi_sched(sc);
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if (!sc->sc_interrupts)
|
||||
arspi_poll(sc);
|
||||
}
|
||||
splx(s);
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||||
return 0;
|
||||
}
|
||||
|
||||
void
|
||||
arspi_sched(struct arspi_softc *sc)
|
||||
{
|
||||
struct spi_transfer *st;
|
||||
struct arspi_job *job;
|
||||
uint32_t ctl, cnt;
|
||||
|
||||
for (;;) {
|
||||
if ((st = sc->sc_transfer) == NULL) {
|
||||
if ((st = spi_transq_first(&sc->sc_transq)) == NULL) {
|
||||
/* no work left to do */
|
||||
break;
|
||||
}
|
||||
spi_transq_dequeue(&sc->sc_transq);
|
||||
sc->sc_transfer = st;
|
||||
}
|
||||
|
||||
arspi_update_job(st);
|
||||
job = st->st_busprivate;
|
||||
|
||||
/* there shouldn't be anything running, but ensure it */
|
||||
do {
|
||||
ctl = GETREG(sc, ARSPI_REG_CTL);
|
||||
} while (ctl & ARSPI_CTL_BUSY);
|
||||
/* clear all of the tx and rx bits */
|
||||
ctl &= ~(ARSPI_CTL_TXCNT_MASK | ARSPI_CTL_RXCNT_MASK);
|
||||
|
||||
if (job->job_flags & JOB_WAIT) {
|
||||
PUTREG(sc, ARSPI_REG_OPCODE, SPIFLASH_CMD_RDSR);
|
||||
/* only the opcode for tx */
|
||||
ctl |= (1 << ARSPI_CTL_TXCNT_SHIFT);
|
||||
/* and one rx byte */
|
||||
ctl |= (1 << ARSPI_CTL_RXCNT_SHIFT);
|
||||
} else if (job->job_flags & JOB_WREN) {
|
||||
PUTREG(sc, ARSPI_REG_OPCODE, SPIFLASH_CMD_WREN);
|
||||
/* just the opcode */
|
||||
ctl |= (1 << ARSPI_CTL_TXCNT_SHIFT);
|
||||
/* no rx bytes */
|
||||
} else {
|
||||
/* set the data */
|
||||
PUTREG(sc, ARSPI_REG_DATA, job->job_data);
|
||||
|
||||
/* set the opcode and the address */
|
||||
PUTREG(sc, ARSPI_REG_OPCODE, job->job_opcode |
|
||||
(job->job_addr << 8));
|
||||
|
||||
/* now set txcnt */
|
||||
cnt = 1; /* opcode */
|
||||
cnt += job->job_addrcnt + job->job_txcnt;
|
||||
ctl |= (cnt << ARSPI_CTL_TXCNT_SHIFT);
|
||||
|
||||
/* now set rxcnt */
|
||||
cnt = job->job_rxcnt;
|
||||
ctl |= (cnt << ARSPI_CTL_RXCNT_SHIFT);
|
||||
}
|
||||
|
||||
/* set the start bit */
|
||||
ctl |= ARSPI_CTL_START;
|
||||
|
||||
PUTREG(sc, ARSPI_REG_CTL, ctl);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
arspi_done(struct arspi_softc *sc, int err)
|
||||
{
|
||||
struct spi_transfer *st;
|
||||
struct arspi_job *job;
|
||||
|
||||
if ((st = sc->sc_transfer) != NULL) {
|
||||
job = st->st_busprivate;
|
||||
|
||||
if (job->job_flags & JOB_WAIT) {
|
||||
if (err == 0) {
|
||||
if ((GETREG(sc, ARSPI_REG_DATA) &
|
||||
SPIFLASH_SR_BUSY) == 0) {
|
||||
/* intermediate wait done */
|
||||
job->job_flags &= ~JOB_WAIT;
|
||||
goto done;
|
||||
}
|
||||
}
|
||||
} else if (job->job_flags & JOB_WREN) {
|
||||
if (err == 0) {
|
||||
job->job_flags &= ~JOB_WREN;
|
||||
goto done;
|
||||
}
|
||||
} else if (err == 0) {
|
||||
/*
|
||||
* When breaking up write jobs, we have to wait until
|
||||
* the WIP bit is clear, and we have to seperately
|
||||
* send WREN for each chunk. These flags facilitate
|
||||
* that.
|
||||
*/
|
||||
if (job->job_flags & JOB_WRITE)
|
||||
job->job_flags |= (JOB_WAIT | JOB_WREN);
|
||||
job->job_data = GETREG(sc, ARSPI_REG_DATA);
|
||||
arspi_finish_job(st);
|
||||
}
|
||||
|
||||
if (err || (job->job_flags & JOB_LAST)) {
|
||||
sc->sc_transfer = NULL;
|
||||
st->st_busprivate = NULL;
|
||||
spi_done(st, err);
|
||||
free(job, M_DEVBUF);
|
||||
}
|
||||
}
|
||||
done:
|
||||
arspi_sched(sc);
|
||||
}
|
||||
|
||||
int
|
||||
arspi_get_byte(struct spi_chunk **chunkp, uint8_t *bytep)
|
||||
{
|
||||
struct spi_chunk *chunk;
|
||||
|
||||
chunk = *chunkp;
|
||||
|
||||
/* skip leading empty (or already consumed) chunks */
|
||||
while (chunk && chunk->chunk_wresid == 0)
|
||||
chunk = chunk->chunk_next;
|
||||
|
||||
if (chunk == NULL) {
|
||||
return ENODATA;
|
||||
}
|
||||
|
||||
/*
|
||||
* chunk must be write only. SPI flash doesn't support
|
||||
* any full duplex operations.
|
||||
*/
|
||||
if ((chunk->chunk_rptr) || !(chunk->chunk_wptr)) {
|
||||
return EINVAL;
|
||||
}
|
||||
|
||||
*bytep = *chunk->chunk_wptr;
|
||||
chunk->chunk_wptr++;
|
||||
chunk->chunk_wresid--;
|
||||
chunk->chunk_rresid--;
|
||||
/* clearing wptr and rptr makes sanity checks later easier */
|
||||
if (chunk->chunk_wresid == 0)
|
||||
chunk->chunk_wptr = NULL;
|
||||
if (chunk->chunk_rresid == 0)
|
||||
chunk->chunk_rptr = NULL;
|
||||
while (chunk && chunk->chunk_wresid == 0)
|
||||
chunk = chunk->chunk_next;
|
||||
|
||||
*chunkp = chunk;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
arspi_put_byte(struct spi_chunk **chunkp, uint8_t byte)
|
||||
{
|
||||
struct spi_chunk *chunk;
|
||||
|
||||
chunk = *chunkp;
|
||||
|
||||
/* skip leading empty (or already consumed) chunks */
|
||||
while (chunk && chunk->chunk_rresid == 0)
|
||||
chunk = chunk->chunk_next;
|
||||
|
||||
if (chunk == NULL) {
|
||||
return EOVERFLOW;
|
||||
}
|
||||
|
||||
/*
|
||||
* chunk must be read only. SPI flash doesn't support
|
||||
* any full duplex operations.
|
||||
*/
|
||||
if ((chunk->chunk_wptr) || !(chunk->chunk_rptr)) {
|
||||
return EINVAL;
|
||||
}
|
||||
|
||||
*chunk->chunk_rptr = byte;
|
||||
chunk->chunk_rptr++;
|
||||
chunk->chunk_wresid--; /* technically this was done at send time */
|
||||
chunk->chunk_rresid--;
|
||||
while (chunk && chunk->chunk_rresid == 0)
|
||||
chunk = chunk->chunk_next;
|
||||
|
||||
*chunkp = chunk;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
arspi_make_job(struct spi_transfer *st)
|
||||
{
|
||||
struct arspi_job *job;
|
||||
struct spi_chunk *chunk;
|
||||
uint8_t byte;
|
||||
int i, rv;
|
||||
|
||||
job = malloc(sizeof (struct arspi_job), M_DEVBUF, M_ZERO);
|
||||
if (job == NULL) {
|
||||
return ENOMEM;
|
||||
}
|
||||
|
||||
st->st_busprivate = job;
|
||||
|
||||
/* skip any leading empty chunks (should not be any!) */
|
||||
chunk = st->st_chunks;
|
||||
|
||||
/* get transfer opcode */
|
||||
if ((rv = arspi_get_byte(&chunk, &byte)) != 0)
|
||||
return rv;
|
||||
|
||||
job->job_opcode = byte;
|
||||
switch (job->job_opcode) {
|
||||
case SPIFLASH_CMD_WREN:
|
||||
case SPIFLASH_CMD_WRDI:
|
||||
case SPIFLASH_CMD_CHIPERASE:
|
||||
break;
|
||||
case SPIFLASH_CMD_RDJI:
|
||||
job->job_rxcnt = 3;
|
||||
break;
|
||||
case SPIFLASH_CMD_RDSR:
|
||||
job->job_rxcnt = 1;
|
||||
break;
|
||||
case SPIFLASH_CMD_WRSR:
|
||||
/*
|
||||
* is this in data, or in address? stick it in data
|
||||
* for now.
|
||||
*/
|
||||
job->job_txcnt = 1;
|
||||
break;
|
||||
case SPIFLASH_CMD_RDID:
|
||||
job->job_addrcnt = 3; /* 3 dummy bytes */
|
||||
job->job_rxcnt = 1;
|
||||
break;
|
||||
case SPIFLASH_CMD_ERASE:
|
||||
job->job_addrcnt = 3;
|
||||
break;
|
||||
case SPIFLASH_CMD_READ:
|
||||
job->job_addrcnt = 3;
|
||||
job->job_flags |= JOB_READ;
|
||||
break;
|
||||
case SPIFLASH_CMD_PROGRAM:
|
||||
job->job_addrcnt = 3;
|
||||
job->job_flags |= JOB_WRITE;
|
||||
break;
|
||||
case SPIFLASH_CMD_READFAST:
|
||||
/*
|
||||
* This is a pain in the arse to support, so we will
|
||||
* rewrite as an ordinary read. But later, after we
|
||||
* obtain the address.
|
||||
*/
|
||||
job->job_addrcnt = 3; /* 3 address */
|
||||
job->job_flags |= JOB_READ;
|
||||
break;
|
||||
default:
|
||||
return EINVAL;
|
||||
}
|
||||
|
||||
for (i = 0; i < job->job_addrcnt; i++) {
|
||||
if ((rv = arspi_get_byte(&chunk, &byte)) != 0)
|
||||
return rv;
|
||||
job->job_addr <<= 8;
|
||||
job->job_addr |= byte;
|
||||
}
|
||||
|
||||
for (i = 0; i < job->job_txcnt; i++) {
|
||||
if ((rv = arspi_get_byte(&chunk, &byte)) != 0)
|
||||
return rv;
|
||||
job->job_data <<= 8;
|
||||
job->job_data |= byte;
|
||||
}
|
||||
|
||||
if (job->job_opcode == SPIFLASH_CMD_READFAST) {
|
||||
/* eat the dummy timing byte */
|
||||
if ((rv = arspi_get_byte(&chunk, &byte)) != 0)
|
||||
return rv;
|
||||
/* rewrite this as a read */
|
||||
job->job_opcode = SPIFLASH_CMD_READ;
|
||||
}
|
||||
|
||||
job->job_chunk = chunk;
|
||||
|
||||
/*
|
||||
* Now quickly check a few other things. Namely, we are not
|
||||
* allowed to have both READ and WRITE.
|
||||
*/
|
||||
for (chunk = job->job_chunk; chunk; chunk = chunk->chunk_next) {
|
||||
if (chunk->chunk_wptr) {
|
||||
job->job_wresid += chunk->chunk_wresid;
|
||||
}
|
||||
if (chunk->chunk_rptr) {
|
||||
job->job_rresid += chunk->chunk_rresid;
|
||||
}
|
||||
}
|
||||
|
||||
if (job->job_rresid && job->job_wresid) {
|
||||
return EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void
|
||||
arspi_update_job(struct spi_transfer *st)
|
||||
{
|
||||
struct arspi_job *job = st->st_busprivate;
|
||||
uint8_t byte;
|
||||
int i;
|
||||
|
||||
if (job->job_flags & (JOB_WAIT|JOB_WREN))
|
||||
return;
|
||||
|
||||
job->job_rxcnt = 0;
|
||||
job->job_txcnt = 0;
|
||||
job->job_data = 0;
|
||||
|
||||
job->job_txcnt = min(job->job_wresid, 4);
|
||||
job->job_rxcnt = min(job->job_rresid, 4);
|
||||
|
||||
job->job_wresid -= job->job_txcnt;
|
||||
job->job_rresid -= job->job_rxcnt;
|
||||
|
||||
for (i = 0; i < job->job_txcnt; i++) {
|
||||
arspi_get_byte(&job->job_chunk, &byte);
|
||||
job->job_data <<= 8;
|
||||
job->job_data |= byte;
|
||||
}
|
||||
|
||||
if ((!job->job_wresid) && (!job->job_rresid)) {
|
||||
job->job_flags |= JOB_LAST;
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
arspi_finish_job(struct spi_transfer *st)
|
||||
{
|
||||
struct arspi_job *job = st->st_busprivate;
|
||||
uint8_t byte;
|
||||
int i;
|
||||
|
||||
job->job_addr += job->job_rxcnt;
|
||||
job->job_addr += job->job_txcnt;
|
||||
for (i = 0; i < job->job_rxcnt; i++) {
|
||||
byte = job->job_data & 0xff;
|
||||
job->job_data >>= 8;
|
||||
arspi_put_byte(&job->job_chunk, byte);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -1,4 +1,4 @@
|
|||
# $NetBSD: files.atheros,v 1.7 2006/09/26 06:37:32 gdamore Exp $
|
||||
# $NetBSD: files.atheros,v 1.8 2006/10/07 07:18:02 gdamore Exp $
|
||||
|
||||
defflag opt_wisoc.h WISOC_AR5312
|
||||
WISOC_AR5315
|
||||
|
|
@ -41,3 +41,8 @@ file arch/mips/atheros/dev/athflash.c athflash
|
|||
device argpio: gpiobus, sysmon_power, sysmon_taskq
|
||||
attach argpio at arbus
|
||||
file arch/mips/atheros/dev/argpio.c argpio
|
||||
|
||||
# On-board SPI controller
|
||||
device arspi: spibus
|
||||
attach arspi at arbus
|
||||
file arch/mips/atheros/dev/arspi.c arspi
|
||||
|
|
|
|||
Loading…
Reference in New Issue