IQ80310-specific setup for the i80312 Companion I/O chip driver.
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thorpej
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/* $NetBSD: i80312_mainbus.c,v 1.1 2001/11/09 03:31:37 thorpej Exp $ */
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/*
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* Copyright (c) 2001 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* IQ80310 front-end for the i80312 Companion I/O chip. We take care
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* of setting up the i80312 memory map, PCI interrupt routing, etc.,
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* which are all specific to the board the i80312 is wired up to.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <machine/autoconf.h>
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#include <machine/bus.h>
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#include <evbarm/iq80310/iq80310reg.h>
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#include <arm/xscale/i80312reg.h>
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#include <arm/xscale/i80312var.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcidevs.h>
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int i80312_mainbus_match(struct device *, struct cfdata *, void *);
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void i80312_mainbus_attach(struct device *, struct device *, void *);
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struct cfattach iopxs_mainbus_ca = {
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sizeof(struct i80312_softc), i80312_mainbus_match,
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i80312_mainbus_attach,
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};
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/* There can be only one. */
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int i80312_mainbus_found;
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int
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i80312_mainbus_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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#if 0
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struct mainbus_attach_args *ma = aux;
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#endif
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if (i80312_mainbus_found)
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return (0);
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#if 1
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/* XXX Shoot arch/arm/mainbus in the head. */
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return (1);
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#else
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if (strcmp(cf->cf_driver->cd_name, ma->ma_name) == 0)
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return (1);
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return (0);
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#endif
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}
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void
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i80312_mainbus_attach(struct device *parent, struct device *self, void *aux)
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{
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struct i80312_softc *sc = (void *) self;
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paddr_t memstart;
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psize_t memsize;
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i80312_mainbus_found = 1;
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/*
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* Fill in the space tag for the i80312's own devices,
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* and hand-craft the space handle for it (the device
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* was mapped during early bootstrap).
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*/
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i80312_bs_init(&i80312_bs_tag, sc);
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sc->sc_st = &i80312_bs_tag;
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sc->sc_sh = IQ80310_80312_VBASE;
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/*
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* We have mapped the the PCI I/O windows in the early
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* bootstrap phase.
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*/
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sc->sc_piow_vaddr = IQ80310_PIOW_VBASE;
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sc->sc_siow_vaddr = IQ80310_SIOW_VBASE;
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sc->sc_is_host = CPLD_READ(IQ80310_BACKPLANE_DET) & 1;
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printf(": i80312 Companion I/O, acting as PCI %s\n",
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sc->sc_is_host ? "host" : "slave");
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/*
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* Set the subsystem vendor/device IDs to "Cyclone" "PCI-700",
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* which is the board-specific identification.
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*/
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bus_space_write_4(sc->sc_st, sc->sc_sh,
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I80312_ATU_BASE + PCI_SUBSYS_ID_REG,
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PCI_ID_CODE(PCI_VENDOR_CYCLONE, PCI_PRODUCT_CYCLONE_PCI_700));
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i80312_sdram_bounds(sc->sc_st, sc->sc_sh, &memstart, &memsize);
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/*
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* Set the Primary Inbound window xlate base to the start
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* of RAM. Set the size to 4K, for now. Just for testing
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* in a host. This obviously has to be customized for each
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* IQ310 application.
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*
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* Note the first 4K of the window is reserved for the
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* messaging unit, so no RAM is going to be accessed here.
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*
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* ..unless we're a host -- in which case, make it work like
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* the Secondary Inbound window (below).
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*/
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if (sc->sc_is_host) {
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sc->sc_pin_base = memstart;
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sc->sc_pin_xlate = memstart;
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sc->sc_pin_size = memsize;
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} else {
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sc->sc_pin_xlate = memstart;
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sc->sc_pin_size = 4096;
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}
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/*
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* Map the Secondary Inbound window 1:1 with local RAM.
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*/
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sc->sc_sin_base = memstart;
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sc->sc_sin_xlate = memstart;
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sc->sc_sin_size = memsize;
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/*
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* XXX Don't use the Primary Outbound windows, for now.
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*/
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sc->sc_pmemout_size = 0;
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sc->sc_pioout_size = 0;
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/*
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* Set the Secondary Outbound Memory window to map 1:1
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* PCI:Local.
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*/
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sc->sc_smemout_base = I80312_PCI_XLATE_SMW_BASE;
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sc->sc_smemout_size = I80312_PCI_XLATE_MSIZE;
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/*
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* Set the Secondary Outbound I/O window to map
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* to PCI address 0 for all 64K of the I/O space.
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*/
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sc->sc_sioout_base = 0;
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sc->sc_sioout_size = I80312_PCI_XLATE_IOSIZE;
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/*
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* XXX For now, suppress all secondary IDSELs (thus making all
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* devices from S_AD[11]..S_AD[25] private).
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*/
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sc->sc_sisr = 0x3ff;
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/*
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* XXX For now, make the entire Secondary Outbound address
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* spaces private.
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*/
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sc->sc_privio_base = sc->sc_sioout_base;
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sc->sc_privio_size = sc->sc_sioout_size;
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sc->sc_privmem_base = sc->sc_smemout_base;
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sc->sc_privmem_size = sc->sc_smemout_size;
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i80312_attach(sc);
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}
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