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The FPU Tag word is a 16bit register, in FPU (387) mode it

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defines 2-bit tags for each FPU data register, in MMX mode it
defines 1-bit tags for each data register. The single bit
tags are stored in the lower 8 bits and thus in the first byte
of the save frame.

See amd64/include/fpu.h and the IA-32 Software Developer's manual Vol 2A.
This commit is contained in:
mlelstv 2009-09-25 13:51:27 +00:00
parent 4ec27f3dc9
commit aef222ecba
1 changed files with 2 additions and 2 deletions
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4
sys/arch/i386/include/npx.h
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@ -1,4 +1,4 @@
/* $NetBSD: npx.h,v 1.22 2006/05/02 19:03:24 drochner Exp $ */ /* $NetBSD: npx.h,v 1.23 2009/09/25 13:51:27 mlelstv Exp $ */
/*- /*-
* Copyright (c) 1990 The Regents of the University of California. * Copyright (c) 1990 The Regents of the University of California.
@ -81,8 +81,8 @@ struct save87 {
struct envxmm { struct envxmm {
/*0*/ uint16_t en_cw; /* FPU Control Word */ /*0*/ uint16_t en_cw; /* FPU Control Word */
uint16_t en_sw; /* FPU Status Word */ uint16_t en_sw; /* FPU Status Word */
uint8_t en_rsvd0;
uint8_t en_tw; /* FPU Tag Word (abridged) */ uint8_t en_tw; /* FPU Tag Word (abridged) */
uint8_t en_rsvd0;
uint16_t en_opcode; /* FPU Opcode */ uint16_t en_opcode; /* FPU Opcode */
uint32_t en_fip; /* FPU Instruction Pointer */ uint32_t en_fip; /* FPU Instruction Pointer */
uint16_t en_fcs; /* FPU IP selector */ uint16_t en_fcs; /* FPU IP selector */