Fix a problem with intr_unmask() that can cause a forever-loop:
- When handling the source-is-masked case in the interrupt vector, set the interrupt bit in a new ci_imasked field and ensure the bit is cleared from ci_ipending. - In intr_unmask(), transfer the bit from ci_imasked to ci_ipending for non-level-sensitive interrupts (the PIC does the work for us in the level-sensitive case), and only force pending interrupts to be processed in this case. (In all cases, make sure the now-unmasked bit is cleared from ci_imasked.) Before, the bit was left in ci_ipending so as not to use edge-triggered interrupts while the source is masked, but Xspllower() relies on the pending bits getting cleared. Tested by forcing all wm(4) interrupts on my test system though an intr_mask() / softint / intr_unmask() cycle and exercising the network heavily.
This commit is contained in:
thorpej
parent
0e79d963e9
commit
9473b3b786
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@ -1,4 +1,4 @@
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# $NetBSD: genassym.cf,v 1.79 2019/12/22 15:09:39 thorpej Exp $
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# $NetBSD: genassym.cf,v 1.80 2019/12/30 23:32:29 thorpej Exp $
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#
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# Copyright (c) 1998, 2006, 2007, 2008 The NetBSD Foundation, Inc.
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@ -252,6 +252,7 @@ define CPU_INFO_ILEVEL offsetof(struct cpu_info, ci_ilevel)
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define CPU_INFO_IDEPTH offsetof(struct cpu_info, ci_idepth)
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if !defined(XENPV)
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define CPU_INFO_IPENDING offsetof(struct cpu_info, ci_ipending)
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define CPU_INFO_IMASKED offsetof(struct cpu_info, ci_imasked)
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define CPU_INFO_IMASK offsetof(struct cpu_info, ci_imask)
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define CPU_INFO_IUNMASK offsetof(struct cpu_info, ci_iunmask)
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define CPU_INFO_ISOURCES offsetof(struct cpu_info, ci_isources)
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@ -1,4 +1,4 @@
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/* $NetBSD: vector.S,v 1.72 2019/12/22 15:09:39 thorpej Exp $ */
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/* $NetBSD: vector.S,v 1.73 2019/12/30 23:32:29 thorpej Exp $ */
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/*
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* Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
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@ -392,7 +392,7 @@ IDTVEC(handle_ ## name ## num) ;\
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incl CPUVAR(IDEPTH) ;\
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movq IS_HANDLERS(%r14),%rbx ;\
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cmpl $0,IS_MASK_COUNT(%r14) /* source currently masked? */ ;\
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jne 7f /* yes, hold it */ ;\
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jne 12f /* yes, hold it */ ;\
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6: \
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movl IH_LEVEL(%rbx),%r12d ;\
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cmpl %r13d,%r12d ;\
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@ -406,7 +406,7 @@ IDTVEC(handle_ ## name ## num) ;\
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jnz 6b ;\
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5: \
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cmpl $0,IS_MASK_COUNT(%r14) /* source now masked? */ ;\
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jne 7f /* yes, deal */ ;\
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jne 12f /* yes, deal */ ;\
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cli ;\
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unmask(num) /* unmask it in hardware */ ;\
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late_ack(num) ;\
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@ -415,10 +415,15 @@ IDTVEC(handle_ ## name ## num) ;\
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7: \
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cli ;\
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orl $(1 << num),CPUVAR(IPENDING) ;\
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level_mask(num) ;\
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8: level_mask(num) ;\
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late_ack(num) ;\
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sti ;\
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jmp _C_LABEL(Xdoreti) /* lower spl and do ASTs */ ;\
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12: \
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cli ;\
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orl $(1 << num),CPUVAR(IMASKED) ;\
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btrl $(num),CPUVAR(IPENDING) ;\
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jmp 8b ;\
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10: \
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cli ;\
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orl $(1 << num),CPUVAR(IPENDING) ;\
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@ -1,4 +1,4 @@
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# $NetBSD: genassym.cf,v 1.116 2019/12/22 15:09:39 thorpej Exp $
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# $NetBSD: genassym.cf,v 1.117 2019/12/30 23:32:29 thorpej Exp $
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#
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# Copyright (c) 1998, 2006, 2007, 2008 The NetBSD Foundation, Inc.
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@ -274,6 +274,7 @@ define CPU_INFO_SIGNATURE offsetof(struct cpu_info, ci_signature)
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define CPU_INFO_GDT offsetof(struct cpu_info, ci_gdt)
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if !defined(XENPV)
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define CPU_INFO_IPENDING offsetof(struct cpu_info, ci_ipending)
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define CPU_INFO_IMASKED offsetof(struct cpu_info, ci_imasked)
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define CPU_INFO_IMASK offsetof(struct cpu_info, ci_imask)
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define CPU_INFO_ISOURCES offsetof(struct cpu_info, ci_isources)
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define CPU_INFO_IUNMASK offsetof(struct cpu_info, ci_iunmask)
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@ -1,4 +1,4 @@
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/* $NetBSD: vector.S,v 1.84 2019/12/22 15:09:39 thorpej Exp $ */
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/* $NetBSD: vector.S,v 1.85 2019/12/30 23:32:29 thorpej Exp $ */
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/*
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* Copyright 2002 (c) Wasabi Systems, Inc.
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@ -65,7 +65,7 @@
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*/
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#include <machine/asm.h>
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__KERNEL_RCSID(0, "$NetBSD: vector.S,v 1.84 2019/12/22 15:09:39 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: vector.S,v 1.85 2019/12/30 23:32:29 thorpej Exp $");
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#include "opt_ddb.h"
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#include "opt_multiprocessor.h"
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@ -409,7 +409,7 @@ IDTVEC(intr_ ## name ## num) ;\
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sti ;\
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movl IS_HANDLERS(%ebp),%ebx ;\
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cmpl $0,IS_MASK_COUNT(%ebp) /* source currently masked? */ ;\
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jne 7f /* yes, hold it */ ;\
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jne 12f /* yes, hold it */ ;\
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6: \
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movl IH_LEVEL(%ebx),%edi ;\
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cmpl %esi,%edi ;\
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@ -423,7 +423,7 @@ IDTVEC(intr_ ## name ## num) ;\
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testl %ebx,%ebx ;\
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jnz 6b ;\
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cmpl $0,IS_MASK_COUNT(%ebp) /* source now masked? */ ;\
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jne 7f /* yes, deal */ ;\
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jne 12f /* yes, deal */ ;\
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cli ;\
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unmask(num) /* unmask it in hardware */ ;\
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late_ack(num) ;\
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@ -431,9 +431,14 @@ IDTVEC(intr_ ## name ## num) ;\
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7: \
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cli ;\
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orl $(1 << num),CPUVAR(IPENDING) ;\
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level_mask(num) ;\
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8: level_mask(num) ;\
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late_ack(num) ;\
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jmp _C_LABEL(Xdoreti) /* lower spl and do ASTs */ ;\
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12: \
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cli ;\
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orl $(1 << num),CPUVAR(IMASKED) ;\
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btrl $(num),CPUVAR(IPENDING) ;\
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jmp 8b ;\
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10: \
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orl $(1 << num),CPUVAR(IPENDING) ;\
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level_mask(num) ;\
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.h,v 1.115 2019/12/01 15:34:46 ad Exp $ */
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/* $NetBSD: cpu.h,v 1.116 2019/12/30 23:32:29 thorpej Exp $ */
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/*
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* Copyright (c) 1990 The Regents of the University of California.
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@ -149,9 +149,11 @@ struct cpu_info {
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struct {
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uint32_t ipending;
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int ilevel;
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uint32_t imasked;
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} ci_istate __aligned(8);
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#define ci_ipending ci_istate.ipending
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#define ci_ilevel ci_istate.ilevel
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#define ci_imasked ci_istate.imasked
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int ci_idepth;
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void * ci_intrstack;
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uint32_t ci_imask[NIPL];
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@ -1,4 +1,4 @@
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/* $NetBSD: intr.c,v 1.149 2019/12/22 16:50:03 ad Exp $ */
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/* $NetBSD: intr.c,v 1.150 2019/12/30 23:32:30 thorpej Exp $ */
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/*
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* Copyright (c) 2007, 2008, 2009, 2019 The NetBSD Foundation, Inc.
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@ -133,7 +133,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.149 2019/12/22 16:50:03 ad Exp $");
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__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.150 2019/12/30 23:32:30 thorpej Exp $");
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#include "opt_intrdebug.h"
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#include "opt_multiprocessor.h"
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@ -1052,9 +1052,24 @@ intr_mask_xcall(void *arg1, void *arg2)
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* If this interrupt source is being moved, don't
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* unmask it at the hw.
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*/
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if (! source->is_distribute_pending)
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if (! source->is_distribute_pending) {
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(*pic->pic_hwunmask)(pic, ih->ih_pin);
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force_pending = true;
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}
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/*
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* For level-sensitive interrupts, the hardware
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* will let us know. For everything else, we
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* need to explicitly handle interrupts that
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* happened when when the source was masked.
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*/
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const uint32_t bit = (1U << ih->ih_slot);
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if (ci->ci_imasked & bit) {
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ci->ci_imasked &= ~bit;
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if (source->is_type != IST_LEVEL) {
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ci->ci_ipending |= bit;
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force_pending = true;
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}
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}
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}
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}
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