Add code to decode small vendor items that are documented. Namely we can
now decode the chipid, and L2 processor affinity data. Also fix a bug where we were reporting the service processor type as a memory controller.
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/* $NetBSD: chpidpnp.h,v 1.1 2006/05/29 22:11:15 garbled Exp $ */
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/*-
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* Copyright (c) 2006 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Tim Rightnour
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Based on:
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* IBM Power Personal Systems Architecture: Residual Data
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* Document Number: PPS-AR-FW0001 Rev 0.5 April 3, 1996
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*/
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#ifndef _CHPIDPNP_H_
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#define _CHPIDPNP_H_
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#define ChipID_Packet 0x70 /* tag for ChipIdPack without size */
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/*
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* The chipid is the vendor id followed by 4 hex digits, e.g. for IBM
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* platforms: Chip_ID=IBMxxxx. To avoid confusion with PnP Device IDs, IBM
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* Chip IDs will begin at 0x8000.
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*/
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typedef enum _Chip_Type {
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Chip_MemCont = 0,
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Chip_ISABridge = 1,
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Chip_PCIBridge = 2,
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Chip_PCMCIABridge = 3,
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Chip_EISABridge = 4,
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Chip_MCABridge = 5,
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Chip_L2Cache = 6,
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Chip_PM = 7,
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Chip_IntrCont = 8,
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Chip_MiscPlanar = 9,
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} Chip_Type;
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typedef enum _Chip_ID {
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/* Memory Controllers Memory Controller range: IBM80xx */
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Dakota = 0x8001, /* IBM8001: IBM North/South Dakota */
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Idaho = 0x8002, /* IBM8002: IBM Idaho */
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Eagle = 0x8003, /* IBM8003: Motorola Eagle */
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Kauai_Lanai = 0x8004, /* IBM8004: IBM Kauai/Lanai */
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Montana_Nevada = 0x8005, /* IBM8005: IBM Montana/Nevada */
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Union = 0x8006, /* IBM8006: IBM Union */
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Cobra_Viper = 0x8007, /* IBM8007: IBM Cobra/Viper */
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Grackle = 0x8008, /* IBM8008: Motorola Grackle */
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/* ISA Bridge chips Bus Bridge Range: IBM81xx */
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SIO_ZB = 0x8100, /* IBM8100: Intel 82378ZB */
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FireCoral = 0x8101, /* IBM8101: IBM FireCoral */
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/* PCI Bridge chips */
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Python = 0x8102, /* IBM8102: IBM Python */
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DEC21050 = 0x8102, /* IBM8103: PCI-PCI (dec 21050) */
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IBM2782351 = 0x8106, /* IBM8106: PCI-PCI */
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IBM2782352 = 0x8109, /* IBM8109: PCI-PCI352 */
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/* PCMCIA Bridge Chips */
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INTEL_8236SL = 0x8104, /* IBM8104: Intel 8236SL */
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RICOH_RF5C366C = 0x8105, /* IBM8105: RICOH RF5C366C */
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/* EISA Bridge Chips */
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INTEL_82374 = 0x8108, /* IBM8108: Intel 82374/82375 */
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/* MCA Bridge Chips */
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MCACoral = 0x8107, /* IBM8107: 6xxxMx - T=1 MCA (servers) */
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/* L2 Cache controller L2 Controller Range: IBM82xx */
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Cheyenne = 0x8200, /* IBM8200: IBM Cheyenne */
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IDT = 0x8201, /* IBM8201: IDT */
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Sony1PB = 0x8202, /* IBM8202: Sony1PB */
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Mamba = 0x8203, /* IBM8203: IBM Mamba */
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Alaska = 0x8204, /* IBM8204: IBM Alaska */
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Glance = 0x8205, /* IBM8205: IBM Glance */
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Ocelot = 0x8206, /* IBM8206: IBM Ocelot */
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/* Power management chips PM Range: IBM83xx */
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Carrera = 0x8300, /* IBM8300: IBM Carrera */
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Sig750 = 0x8301, /* IBM8301: Signetics 87C750 */
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/* Interrupt controller chips PIC Chip range: IBM84xx */
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MPIC_2 = 0x8400, /* IBM8400: IBM MPIC-2 */
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/* Miscellaneous Planar chips MISC Chip Range: IBM8Fxx */
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DallasRTC = 0x8F00, /* IBM8F00: Dallas 1385 compatible */
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Dallas1585 = 0x8F01, /* IBM8F01: Dallas 1585 compatible */
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Timer8254 = 0x8F10, /* IBM8F10: 8254-compatible timer */
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HarddiskLt = 0x8FF0, /* IBM8FF0: Op Panel HD light */
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} Chip_ID;
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/* small tag = 0x7n with n bytes. Type == 1 for ChipID
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* VendorID0:
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* bit(7) = 0
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* bits(6:2) 1st character in compressed ASCII
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* bits(1:0) 2nd character in compressed ASCII bits(4:3)
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* VendorID1:
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* bits(7:5) 2nd character in compressed ASCII bits(2:0)
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* bits(4:0) 3rd character in compressed ASCII
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* Name:
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* Example: IBM8001
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* I,B,M = 01001, 00010, 01101
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* bytes 0,1 = 00100100,01001101
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* = 2 4 4 D
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* byte0 = 24 byte1 = 4D byte2 = 01 byte3 = 80
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*/
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typedef struct _ChipIDPack {
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unsigned char Tag;
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unsigned char Type;
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unsigned char VendorID0;
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unsigned char VendorID1;
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unsigned char Name[2];
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} ChipIDPack;
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#endif /* _CHPIDPNP_H_ */
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@ -1,4 +1,4 @@
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/* $NetBSD: residual.c,v 1.11 2006/05/25 02:11:13 garbled Exp $ */
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/* $NetBSD: residual.c,v 1.12 2006/05/29 22:11:15 garbled Exp $ */
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/*-
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* Copyright (c) 2002 The NetBSD Foundation, Inc.
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@ -37,7 +37,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: residual.c,v 1.11 2006/05/25 02:11:13 garbled Exp $");
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__KERNEL_RCSID(0, "$NetBSD: residual.c,v 1.12 2006/05/29 22:11:15 garbled Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -49,6 +49,8 @@ __KERNEL_RCSID(0, "$NetBSD: residual.c,v 1.11 2006/05/25 02:11:13 garbled Exp $"
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#include "opt_residual.h"
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#ifdef RESIDUAL_DATA_DUMP
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#include <machine/chpidpnp.h>
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static void make_pnp_device_tree(void *);
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static void bustype_subr(DEVICE_ID *);
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@ -542,6 +544,84 @@ make_pnp_device_tree(void *v)
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}
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}
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static void small_vendor_chipid(void *v)
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{
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ChipIDPack *p = v;
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char chipid[8];
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int16_t id;
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int i, j;
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struct _svid {
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int16_t id;
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const char *name;
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int type;
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} svid[] = {
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{ Dakota, "IBM North/South Dakota", Chip_MemCont },
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{ Idaho, "IBM Idaho", Chip_MemCont },
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{ Eagle, "Motorola Eagle", Chip_MemCont },
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{ Kauai_Lanai, "IBM Kauai/Lanai", Chip_MemCont },
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{ Montana_Nevada,"IBM Montana/Nevada", Chip_MemCont },
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{ Union, "IBM Union", Chip_MemCont },
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{ Cobra_Viper, "IBM Cobra/Viper", Chip_MemCont },
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{ Grackle, "Motorola Grackle", Chip_MemCont },
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{ SIO_ZB, "Intel 82378ZB", Chip_ISABridge },
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{ FireCoral, "IBM FireCoral", Chip_ISABridge },
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{ Python, "IBM Python", Chip_PCIBridge },
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{ DEC21050, "PCI-PCI (DEC 21050)", Chip_PCIBridge },
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{ IBM2782351, "PCI-PCI (IBM 2782351)", Chip_PCIBridge },
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{ IBM2782352, "PCI-PCI (IBM 2782352)", Chip_PCIBridge },
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{ INTEL_8236SL, "Intel 8236SL", Chip_PCMCIABridge },
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{ RICOH_RF5C366C,"RICOH RF5C366C", Chip_PCMCIABridge },
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{ INTEL_82374, "Intel 82374/82375", Chip_EISABridge },
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{ MCACoral, "MCA Coral", Chip_MCABridge },
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{ Cheyenne, "IBM Cheyenne", Chip_L2Cache },
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{ IDT, "IDT", Chip_L2Cache },
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{ Sony1PB, "Sony1PB", Chip_L2Cache },
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{ Mamba, "IBM Mamba", Chip_L2Cache },
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{ Alaska, "IBM Alaska", Chip_L2Cache },
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{ Glance, "IBM Glance", Chip_L2Cache },
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{ Ocelot, "IBM Ocelot", Chip_L2Cache },
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{ Carrera, "IBM Carrera", Chip_PM },
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{ Sig750, "Signetics 87C750", Chip_PM },
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{ MPIC_2, "IBM MPIC-2", Chip_IntrCont },
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{ DallasRTC, "Dallas 1385 compatible", Chip_MiscPlanar },
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{ Dallas1585, "Dallas 1585 compatible", Chip_MiscPlanar },
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{ Timer8254, "8254-compatible timer", Chip_MiscPlanar },
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{ HarddiskLt, "Op Panel HD light", Chip_MiscPlanar },
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{ 0, NULL, -1 },
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};
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const char *chiptype[] = {
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"Memory Controller",
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"ISA Bridge",
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"PCI Bridge",
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"PCMCIA Bridge",
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"EISA Bridge",
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"MCA Bridge",
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"L2 Cache Controller",
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"Power Management Controller",
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"Interrupt Controller",
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"Misc. Planar Device"
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};
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id = le16dec(&p->Name[0]);
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snprintf(chipid, 8, "%c%c%c%0hX",
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((p->VendorID0 >> 2) & 0x1f) + 'A' - 1,
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(((p->VendorID0 & 3) << 3) | ((p->VendorID1 >> 5) & 7)) + 'A' - 1,
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(p->VendorID1 & 0x1f) + 'A' - 1, id);
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for (i = 0, j = -1; svid[i].name != NULL; i++) {
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if (id == svid[i].id) {
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j = i;
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break;
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}
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}
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printf("Chip ID: %s\n", chipid);
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if (j == -1) {
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printf(" Unknown Chip Type\n");
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return;
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}
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printf(" %s: %s\n", chiptype[svid[j].type], svid[j].name);
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return;
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}
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static int
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pnp_small_pkt(void *v)
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{
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@ -687,29 +767,28 @@ IRQout:
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printf(" SmallVendorItem: ");
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switch (p[1]) {
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case 1:
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printf("%c%c%c",
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((p[2] >> 2) & 0x1f) + 'A' - 1,
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(((p[2] & 3) << 3) | ((p[3] >> 5) & 7)) + 'A' - 1,
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(p[3] & 0x1f) + 'A' - 1);
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small_vendor_chipid(v);
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break;
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case 3:
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printf("Processor Number: %d\n", p[2]);
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break;
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default:
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printf("\n");
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for (i = 0; i < size - 1; i++) {
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if ((i % 16) == 0)
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printf(" ");
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printf("%02x ", p[i + 1]);
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if ((i % 16) == 15)
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printf("\n");
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}
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if ((i % 16) != 0)
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printf("\n");
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break;
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}
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printf("\n");
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for (i = 0; i < size - 1; i++) {
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if ((i % 16) == 0)
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printf(" ");
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printf("%02x ", p[i + 1]);
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if ((i % 16) == 15)
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printf("\n");
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}
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if ((i % 16) != 0)
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printf("\n");
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}
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break;
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}
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default: {
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unsigned char *p = v;
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@ -1516,11 +1595,17 @@ service_subr(DEVICE_ID *id)
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const char *p, *q = NULL;
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switch (id->SubType) {
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case GeneralMemoryController:
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p = "GeneralMemoryController";
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case ServiceProcessorClass1:
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p = "ServiceProcessorClass1";
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break;
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case ServiceProcessorClass2:
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p = "ServiceProcessorClass2";
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break;
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case ServiceProcessorClass3:
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p = "ServiceProcessorClass3";
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break;
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default:
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p = "UnknownMemoryController";
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p = "UnknownServiceProcessor";
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break;
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}
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