Switch next68k over to the common m68k vector table.
This commit is contained in:
thorpej
parent
8c9ef20d99
commit
64d54d958e
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@ -1,4 +1,4 @@
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# $NetBSD: files.next68k,v 1.43 2024/01/09 04:16:26 thorpej Exp $
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# $NetBSD: files.next68k,v 1.44 2024/01/13 21:40:53 thorpej Exp $
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# next68k-specific configuration info
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@ -40,6 +40,7 @@ file arch/m68k/m68k/mmu_subr.s
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file arch/m68k/m68k/pmap_motorola.c
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file arch/m68k/m68k/procfs_machdep.c procfs
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file arch/m68k/m68k/sys_machdep.c
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file arch/m68k/m68k/vectors.c
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file arch/m68k/m68k/vm_machdep.c
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# include "arch/m68k/fpe/files.fpe"
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.h,v 1.53 2024/01/09 04:16:26 thorpej Exp $ */
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/* $NetBSD: cpu.h,v 1.54 2024/01/13 21:40:54 thorpej Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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@ -112,8 +112,6 @@ extern volatile unsigned int interrupt_depth;
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extern int astpending; /* need to trap before returning to user mode */
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extern void (*vectab[])(void);
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/* locore.s functions */
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void doboot(void) __attribute__((__noreturn__));
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int nmihand(void *);
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@ -0,0 +1,50 @@
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/* $NetBSD: vectors.h,v 1.1 2024/01/13 21:40:54 thorpej Exp $ */
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/*-
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* Copyright (c) 2024 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _NEXT68K_VECTORS_H_
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#define _NEXT68K_VECTORS_H_
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#ifdef _KERNEL
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#include <m68k/vectors.h>
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#define MACHINE_AV0_HANDLER spurintr
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#define MACHINE_AV1_HANDLER intrhand_autovec
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#define MACHINE_AV2_HANDLER intrhand_autovec
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#define MACHINE_AV3_HANDLER intrhand_autovec
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#define MACHINE_AV4_HANDLER intrhand_autovec
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#define MACHINE_AV5_HANDLER intrhand_autovec
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#define MACHINE_AV6_HANDLER intrhand_autovec
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#define MACHINE_AV7_HANDLER lev7intr
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#endif /* _KERNEL */
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#endif /* _NEXT68K_VECTORS_H_ */
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@ -1,11 +1,4 @@
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/* $NetBSD: isr.c,v 1.33 2023/02/03 23:19:03 tsutsui Exp $ */
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/*
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* This file was taken from mvme68k/mvme68k/isr.c
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* should probably be re-synced when needed.
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* Darrin B. Jewell <jewell@mit.edu> Tue Nov 10 05:07:16 1998
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* original cvs id: NetBSD: isr.c,v 1.12 1998/07/05 06:49:07 jonathan Exp
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*/
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/* $NetBSD: isr.c,v 1.34 2024/01/13 21:40:54 thorpej Exp $ */
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/*-
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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@ -41,7 +34,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: isr.c,v 1.33 2023/02/03 23:19:03 tsutsui Exp $");
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__KERNEL_RCSID(0, "$NetBSD: isr.c,v 1.34 2024/01/13 21:40:54 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -59,7 +52,6 @@ __KERNEL_RCSID(0, "$NetBSD: isr.c,v 1.33 2023/02/03 23:19:03 tsutsui Exp $");
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volatile unsigned int interrupt_depth;
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isr_autovec_list_t isr_autovec[NISRAUTOVEC];
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struct isr_vectored isr_vectored[NISRVECTORED];
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static const char irqgroupname[] = "hard irqs";
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struct evcnt next68k_irq_evcnt[] = {
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EVCNT_INITIALIZER(EVCNT_TYPE_INTR, NULL, irqgroupname, "spur"),
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@ -77,7 +69,6 @@ int ssir;
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extern u_int intrcnt[]; /* from locore.s. XXXSCW: will go away soon */
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extern void (*vectab[])(void);
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extern void badtrap(void);
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extern void intrhand_vectored(void);
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#if 0
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static int spurintr(void *);
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@ -95,10 +86,6 @@ isrinit(void)
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/* Initialise the interrupt event counts */
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for (i = 0; i < (sizeof(next68k_irq_evcnt) / sizeof(struct evcnt)); i++)
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evcnt_attach_static(&next68k_irq_evcnt[i]);
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/* Arrange to trap Spurious and NMI auto-vectored Interrupts */
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/* isrlink_autovec(spurintr, NULL, 0, 0, NULL); */
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/* isrlink_autovec(nmihand, NULL, 7, 0, NULL); */
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}
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/*
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@ -171,40 +158,6 @@ isrlink_autovec(int (*func)(void *), void *arg, int ipl, int priority,
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LIST_INSERT_AFTER(curisr, newisr, isr_link);
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}
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/*
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* Establish a vectored interrupt handler.
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* Called by bus interrupt establish functions.
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*/
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void
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isrlink_vectored(int (*func)(void *), void *arg, int ipl, int vec,
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struct evcnt *evcnt)
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{
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struct isr_vectored *isr;
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#ifdef DIAGNOSTIC
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if ((ipl < 0) || (ipl >= NISRAUTOVEC))
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panic("isrlink_vectored: bad ipl %d", ipl);
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if ((vec < ISRVECTORED) || (vec >= ISRVECTORED + NISRVECTORED))
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panic("isrlink_vectored: bad vec 0x%x", vec);
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#endif
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isr = &isr_vectored[vec - ISRVECTORED];
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#ifdef DIAGNOSTIC
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if ((vectab[vec] != badtrap) || (isr->isr_func != NULL))
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panic("isrlink_vectored: vec 0x%x not available", vec);
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#endif
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/* Fill in the new entry. */
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isr->isr_func = func;
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isr->isr_arg = arg;
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isr->isr_ipl = ipl;
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isr->isr_evcnt = evcnt;
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/* Hook into the vector table. */
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vectab[vec] = intrhand_vectored;
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}
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/*
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* Return a pointer to the evcnt structure for
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* the specified ipl.
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@ -222,25 +175,6 @@ isrlink_evcnt(int ipl)
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return (&next68k_irq_evcnt[ipl]);
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}
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/*
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* Unhook a vectored interrupt.
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*/
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void
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isrunlink_vectored(int vec)
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{
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#ifdef DIAGNOSTIC
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if ((vec < ISRVECTORED) || (vec >= ISRVECTORED + NISRVECTORED))
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panic("isrunlink_vectored: bad vec 0x%x", vec);
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if (vectab[vec] != intrhand_vectored)
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panic("isrunlink_vectored: not vectored interrupt");
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#endif
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vectab[vec] = badtrap;
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memset(&isr_vectored[vec - ISRVECTORED], 0, sizeof(struct isr_vectored));
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}
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/*
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* This is the dispatcher called by the low-level
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* assembly language autovectored interrupt routine.
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@ -345,47 +279,6 @@ cpu_intr_p(void)
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return idepth != 0;
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}
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/*
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* This is the dispatcher called by the low-level
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* assembly language vectored interrupt routine.
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*/
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void
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isrdispatch_vectored(int ipl, struct clockframe *frame)
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{
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struct isr_vectored *isr;
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int vec;
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vec = (frame->vec >> 2) - ISRVECTORED;
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#ifdef DIAGNOSTIC
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if ((vec < 0) || (vec >= NISRVECTORED))
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panic("isrdispatch_vectored: bad vec 0x%x", frame->vec);
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#endif
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isr = &isr_vectored[vec];
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intrcnt[ipl]++; /* XXXSCW: Will go away soon */
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next68k_irq_evcnt[ipl].ev_count++;
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curcpu()->ci_data.cpu_nintr++;
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if (isr->isr_func == NULL) {
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printf("isrdispatch_vectored: no handler for vec 0x%x\n",
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frame->vec);
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vectab[vec + ISRVECTORED] = badtrap;
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return;
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}
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/*
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* Handler gets exception frame if argument is NULL.
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*/
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if ((*isr->isr_func)(isr->isr_arg ? isr->isr_arg : frame) == 0)
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printf("isrdispatch_vectored: vec 0x%x not claimed\n",
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frame->vec);
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else
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if (isr->isr_evcnt)
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isr->isr_evcnt->ev_count++;
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}
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#if 0
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/* ARGSUSED */
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static int
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@ -1,4 +1,4 @@
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/* $NetBSD: isr.h,v 1.8 2021/12/05 04:54:21 msaitoh Exp $ */
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/* $NetBSD: isr.h,v 1.9 2024/01/13 21:40:54 thorpej Exp $ */
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/*
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* This file was taken from mvme68k/mvme68k/isr.h
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@ -51,7 +51,6 @@
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* of the vector table.
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*/
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#define ISRVECTORED 0x40
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#define NISRVECTORED 192
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/*
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* Autovectored interrupt handler cookie.
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@ -92,8 +91,5 @@ extern struct evcnt next68k_irq_evcnt[];
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void isrinit(void);
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struct evcnt *isrlink_evcnt(int);
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void isrlink_autovec(int (*)(void *), void *, int, int, struct evcnt *);
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void isrlink_vectored(int (*)(void *), void *, int, int, struct evcnt *);
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void isrunlink_vectored(int);
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void isrdispatch_autovec(struct clockframe *);
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void isrdispatch_vectored(int, struct clockframe *);
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void netintr(void);
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.s,v 1.80 2024/01/12 23:36:29 thorpej Exp $ */
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/* $NetBSD: locore.s,v 1.81 2024/01/13 21:40:54 thorpej Exp $ */
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/*
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* Copyright (c) 1998 Darrin B. Jewell
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@ -125,8 +125,6 @@ GLOBAL(endstack)
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GLOBAL(bgnstack)
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ASLOCAL(tmpstk)
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#include <next68k/next68k/vectors.s>
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/*
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* Macro to relocate a symbol, used before MMU is enabled.
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* On the NeXT, memory is laid out as in the mach header
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@ -258,41 +256,6 @@ Lis68020:
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*/
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Lstart1:
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/*
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* Now that we know what CPU we have, initialize the address error
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* and bus error handlers in the vector table:
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*
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* vectab+8 bus error
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* vectab+12 address error
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*/
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RELOC(cputype, %a0)
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#if 0
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/* XXX assembler/linker feature/bug */
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RELOC(vectab, %a2)
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#else
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movl #_C_LABEL(vectab),%a2
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addl %a5,%a2
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#endif
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#if defined(M68040)
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cmpl #CPU_68040,%a0@ | 68040?
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jne 1f | no, skip
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movl #_C_LABEL(buserr40),%a2@(8)
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movl #_C_LABEL(addrerr4060),%a2@(12)
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jra Lstart2
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1:
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#endif
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#if defined(M68020) || defined(M68030)
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cmpl #CPU_68040,%a0@ | 68040?
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jeq 1f | yes, skip
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movl #_C_LABEL(busaddrerr2030),%a2@(8)
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movl #_C_LABEL(busaddrerr2030),%a2@(12)
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jra Lstart2
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1:
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#endif
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/* Config botch; no hope. */
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PANIC("Config botch in locore")
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Lstart2:
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/* initialize source/destination control registers for movs */
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moveq #FC_USERD,%d0 | user space
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movc %d0,%sfc | as source
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@ -340,19 +303,8 @@ Lmotommu1:
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movl %d1,%a0@(4) | segtable address
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pmove %a0@,%srp | load the supervisor root pointer
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#endif /* M68030 */
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Lstploaddone:
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/*
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* Set up the vector table, and race to get the MMU
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* enabled.
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*/
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movc %vbr,%d0 | Keep copy of ROM VBR
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ASRELOC(save_vbr,%a0)
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movl %d0,%a0@
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movl #_C_LABEL(vectab),%d0 | set Vector Base Register
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movc %d0,%vbr
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RELOC(mmutype, %a0)
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cmpl #MMU_68040,%a0@ | 68040?
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jne Lmotommu2 | no, skip
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@ -382,6 +334,7 @@ Lturnoffttr:
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.long 0x4e7b0005 | movc %d0,%itt1
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.long 0x4e7b0007 | movc %d0,%dtt1
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jmp Lenab1
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Lmotommu2:
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pflusha
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RELOC(prototc, %a2)
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@ -393,10 +346,8 @@ Lmotommu2:
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* Should be running mapped from this point on
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*/
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Lenab1:
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lea _ASM_LABEL(tmpstk),%sp | temporary stack
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bsr Lpushpc | Push the PC on the stack.
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Lpushpc:
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lea _ASM_LABEL(tmpstk),%sp | re-load temporary stack
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jbsr _C_LABEL(vec_init) | initialize vector table
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/* call final pmap setup */
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jbsr _C_LABEL(pmap_bootstrap_finalize)
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/* set kernel stack, user SP */
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@ -697,8 +648,6 @@ Lbrkpt3:
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* For vectored interrupts, we pull the pc, evec, and exception frame
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* and pass them to the vectored interrupt dispatcher. The vectored
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* interrupt dispatcher will deal with strays.
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*
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* intrhand_vectored is the entry point for vectored interrupts.
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*/
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ENTRY_NOPROFILE(spurintr) /* Level 0 */
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@ -730,16 +679,6 @@ ENTRY_NOPROFILE(lev7intr) /* level 7: parity errors, reset key */
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addql #8,%sp | pop SP and stack adjust
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jra _ASM_LABEL(rei) | all done
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ENTRY_NOPROFILE(intrhand_vectored)
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addql #1,_C_LABEL(interrupt_depth)
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INTERRUPT_SAVEREG
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lea %sp@(16),%a1 | get pointer to frame
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movl %a1,%sp@-
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movw %sr,%d0
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bfextu %d0,21,3,%d0 | Get current ipl
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movl %d0,%sp@- | Push it
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jbsr _C_LABEL(isrdispatch_vectored) | call dispatcher
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addql #8,%sp
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Lintrhand_exit:
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INTERRUPT_RESTOREREG
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subql #1,_C_LABEL(interrupt_depth)
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@ -964,7 +903,7 @@ ENTRY_NOPROFILE(doboot)
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ASRELOC(Ldoboot1, %a0)
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jmp %a0@ | jump into physical address space.
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Ldoboot1:
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ASRELOC(save_vbr, %a0)
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RELOC(saved_vbr, %a0)
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movl %a0@,%d0
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movc %d0,%vbr
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@ -1022,9 +961,6 @@ GLOBAL(fbbasepa)
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GLOBAL(fblimitpa)
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.long MONOTOP | PA of end of framebuffer
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ASLOCAL(save_vbr) | VBR from ROM
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.long 0xdeadbeef
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GLOBAL(monbootflag)
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.long 0
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@ -1,158 +0,0 @@
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| $NetBSD: vectors.s,v 1.13 2023/02/03 23:13:01 tsutsui Exp $
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|
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| This file was taken from mvme68k/mvme68k/vectors.s
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| should probably be re-synced when needed.
|
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| Darrin B. Jewell <jewell@mit.edu> Tue Nov 10 05:07:16 1998
|
||||
| original cvs id: NetBSD: vectors.s,v 1.7 1998/10/18 04:42:37 itohy Exp
|
||||
|
||||
| Copyright (c) 1988 University of Utah
|
||||
| Copyright (c) 1990, 1993
|
||||
| The Regents of the University of California. All rights reserved.
|
||||
|
|
||||
| Redistribution and use in source and binary forms, with or without
|
||||
| modification, are permitted provided that the following conditions
|
||||
| are met:
|
||||
| 1. Redistributions of source code must retain the above copyright
|
||||
| notice, this list of conditions and the following disclaimer.
|
||||
| 2. Redistributions in binary form must reproduce the above copyright
|
||||
| notice, this list of conditions and the following disclaimer in the
|
||||
| documentation and/or other materials provided with the distribution.
|
||||
| 3. Neither the name of the University nor the names of its contributors
|
||||
| may be used to endorse or promote products derived from this software
|
||||
| without specific prior written permission.
|
||||
|
|
||||
| THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
| ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
| IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
| ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
| FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
| DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
| OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
| HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
| LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
| OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
| SUCH DAMAGE.
|
||||
|
|
||||
| @(#)vectors.s 8.2 (Berkeley) 1/21/94
|
||||
|
|
||||
|
||||
.data
|
||||
|
||||
GLOBAL(vectab)
|
||||
VECTOR(badtrap) /* 0: (unused reset SSP) */
|
||||
VECTOR(badtrap) /* 1: NOT USED (reset PC) */
|
||||
VECTOR(badtrap) /* 2: bus error (set at boot in locore.s) */
|
||||
VECTOR(badtrap) /* 3: address error (set at boot in locore.s) */
|
||||
VECTOR(illinst) /* 4: illegal instruction */
|
||||
VECTOR(zerodiv) /* 5: zero divide */
|
||||
VECTOR(chkinst) /* 6: CHK instruction */
|
||||
VECTOR(trapvinst) /* 7: TRAPV instruction */
|
||||
VECTOR(privinst) /* 8: privilege violation */
|
||||
VECTOR(trace) /* 9: trace */
|
||||
VECTOR(illinst) /* 10: line 1010 emulator */
|
||||
VECTOR(fpfline) /* 11: line 1111 emulator */
|
||||
VECTOR(badtrap) /* 12: unassigned, reserved */
|
||||
VECTOR(coperr) /* 13: coprocessor protocol violation */
|
||||
VECTOR(fmterr) /* 14: format error */
|
||||
VECTOR(badtrap) /* 15: uninitialized interrupt vector */
|
||||
VECTOR(badtrap) /* 16: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 17: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 18: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 19: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 20: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 21: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 22: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 23: unassigned, reserved */
|
||||
#if 1
|
||||
VECTOR(spurintr) /* 24: spurious interrupt */
|
||||
#else
|
||||
VECTOR(intrhand_autovec)
|
||||
#endif
|
||||
VECTOR(intrhand_autovec) /* 25: level 1 interrupt autovector */
|
||||
VECTOR(intrhand_autovec) /* 26: level 2 interrupt autovector */
|
||||
VECTOR(intrhand_autovec) /* 27: level 3 interrupt autovector */
|
||||
VECTOR(intrhand_autovec) /* 28: level 4 interrupt autovector */
|
||||
VECTOR(intrhand_autovec) /* 29: level 5 interrupt autovector */
|
||||
VECTOR(intrhand_autovec) /* 30: level 6 interrupt autovector */
|
||||
#if 1
|
||||
VECTOR(lev7intr) /* 31: level 7 interrupt autovector */
|
||||
#else
|
||||
VECTOR(intrhand_autovec)
|
||||
#endif
|
||||
VECTOR(trap0) /* 32: syscalls */
|
||||
#ifdef COMPAT_13
|
||||
VECTOR(trap1) /* 33: compat_13_sigreturn */
|
||||
#else
|
||||
VECTOR(illinst)
|
||||
#endif
|
||||
VECTOR(trap2) /* 34: trace */
|
||||
#ifdef COMPAT_16
|
||||
VECTOR(trap3) /* 35: compat_16_sigreturn */
|
||||
#else
|
||||
VECTOR(illinst)
|
||||
#endif
|
||||
VECTOR(illinst) /* 36: TRAP instruction vector */
|
||||
VECTOR(illinst) /* 37: TRAP instruction vector */
|
||||
VECTOR(illinst) /* 38: TRAP instruction vector */
|
||||
VECTOR(illinst) /* 39: TRAP instruction vector */
|
||||
VECTOR(illinst) /* 40: TRAP instruction vector */
|
||||
VECTOR(illinst) /* 41: TRAP instruction vector */
|
||||
VECTOR(illinst) /* 42: TRAP instruction vector */
|
||||
VECTOR(illinst) /* 43: TRAP instruction vector */
|
||||
VECTOR(trap12) /* 44: TRAP instruction vector */
|
||||
VECTOR(illinst) /* 45: TRAP instruction vector */
|
||||
VECTOR(illinst) /* 46: TRAP instruction vector */
|
||||
VECTOR(trap15) /* 47: TRAP instruction vector */
|
||||
#ifdef FPSP
|
||||
ASVECTOR(bsun) /* 48: FPCP branch/set on unordered cond */
|
||||
ASVECTOR(inex) /* 49: FPCP inexact result */
|
||||
ASVECTOR(dz) /* 50: FPCP divide by zero */
|
||||
ASVECTOR(unfl) /* 51: FPCP underflow */
|
||||
ASVECTOR(operr) /* 52: FPCP operand error */
|
||||
ASVECTOR(ovfl) /* 53: FPCP overflow */
|
||||
ASVECTOR(snan) /* 54: FPCP signalling NAN */
|
||||
#else
|
||||
VECTOR(fpfault) /* 48: FPCP branch/set on unordered cond */
|
||||
VECTOR(fpfault) /* 49: FPCP inexact result */
|
||||
VECTOR(fpfault) /* 50: FPCP divide by zero */
|
||||
VECTOR(fpfault) /* 51: FPCP underflow */
|
||||
VECTOR(fpfault) /* 52: FPCP operand error */
|
||||
VECTOR(fpfault) /* 53: FPCP overflow */
|
||||
VECTOR(fpfault) /* 54: FPCP signalling NAN */
|
||||
#endif
|
||||
VECTOR(fpunsupp) /* 55: FPCP unimplemented data type */
|
||||
VECTOR(badtrap) /* 56: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 57: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 58: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 59: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 60: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 61: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 62: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 63: unassigned, reserved */
|
||||
|
||||
#define BADTRAP16 \
|
||||
VECTOR(badtrap) ; VECTOR(badtrap) ; \
|
||||
VECTOR(badtrap) ; VECTOR(badtrap) ; \
|
||||
VECTOR(badtrap) ; VECTOR(badtrap) ; \
|
||||
VECTOR(badtrap) ; VECTOR(badtrap) ; \
|
||||
VECTOR(badtrap) ; VECTOR(badtrap) ; \
|
||||
VECTOR(badtrap) ; VECTOR(badtrap) ; \
|
||||
VECTOR(badtrap) ; VECTOR(badtrap) ; \
|
||||
VECTOR(badtrap) ; VECTOR(badtrap)
|
||||
|
||||
/*
|
||||
* PCC, PCCTWO, MC, and VME vectors are installed from 64-255
|
||||
* by the *intr_extablish() functions.
|
||||
*/
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
Loading…
Reference in New Issue