Switch mvme68k to the common m68k vector table.
This commit is contained in:
parent
91b192d65c
commit
8c9ef20d99
|
@ -1,4 +1,4 @@
|
|||
# $NetBSD: files.mvme68k,v 1.66 2024/01/09 04:16:25 thorpej Exp $
|
||||
# $NetBSD: files.mvme68k,v 1.67 2024/01/13 20:18:46 thorpej Exp $
|
||||
|
||||
# config file for mvme68k
|
||||
|
||||
|
@ -103,6 +103,7 @@ file arch/m68k/m68k/mmu_subr.s
|
|||
file arch/m68k/m68k/pmap_motorola.c
|
||||
file arch/m68k/m68k/procfs_machdep.c procfs
|
||||
file arch/m68k/m68k/sys_machdep.c
|
||||
file arch/m68k/m68k/vectors.c
|
||||
file arch/m68k/m68k/vm_machdep.c
|
||||
file dev/cons.c
|
||||
file dev/cninit.c
|
||||
|
|
|
@ -0,0 +1,50 @@
|
|||
/* $NetBSD: vectors.h,v 1.1 2024/01/13 20:18:46 thorpej Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2024 The NetBSD Foundation, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This code is derived from software contributed to The NetBSD Foundation
|
||||
* by Jason R. Thorpe.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _MVME68K_VECTORS_H_
|
||||
#define _MVME68K_VECTORS_H_
|
||||
|
||||
#ifdef _KERNEL
|
||||
|
||||
#include <m68k/vectors.h>
|
||||
|
||||
#define MACHINE_AV0_HANDLER intrhand_autovec
|
||||
#define MACHINE_AV1_HANDLER intrhand_autovec
|
||||
#define MACHINE_AV2_HANDLER intrhand_autovec
|
||||
#define MACHINE_AV3_HANDLER intrhand_autovec
|
||||
#define MACHINE_AV4_HANDLER intrhand_autovec
|
||||
#define MACHINE_AV5_HANDLER intrhand_autovec
|
||||
#define MACHINE_AV6_HANDLER intrhand_autovec
|
||||
#define MACHINE_AV7_HANDLER intrhand_autovec
|
||||
|
||||
#endif /* _KERNEL */
|
||||
|
||||
#endif /* _MVME68K_VECTORS_H_ */
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: locore.s,v 1.125 2024/01/12 23:36:29 thorpej Exp $ */
|
||||
/* $NetBSD: locore.s,v 1.126 2024/01/13 20:18:47 thorpej Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1988 University of Utah.
|
||||
|
@ -62,12 +62,6 @@
|
|||
.space PAGE_SIZE
|
||||
ASLOCAL(tmpstk)
|
||||
|
||||
ASLOCAL(bug_vbr)
|
||||
.long 0
|
||||
|
||||
#include <mvme68k/mvme68k/vectors.s>
|
||||
|
||||
|
||||
/*
|
||||
* Macro to relocate a symbol, used before MMU is enabled.
|
||||
*/
|
||||
|
@ -201,8 +195,6 @@ ASLOCAL(Lbrdid2mach)
|
|||
.word CPU_68030
|
||||
.word MMU_68030
|
||||
.word FPU_68882
|
||||
.long _C_LABEL(busaddrerr2030)
|
||||
.long _C_LABEL(busaddrerr2030)
|
||||
.long Linit147
|
||||
#endif
|
||||
#ifdef MVME162
|
||||
|
@ -210,8 +202,6 @@ ASLOCAL(Lbrdid2mach)
|
|||
.word CPU_68040
|
||||
.word MMU_68040
|
||||
.word FPU_68040
|
||||
.long _C_LABEL(buserr40)
|
||||
.long _C_LABEL(addrerr4060)
|
||||
.long Linit1x2
|
||||
#endif
|
||||
#ifdef MVME167
|
||||
|
@ -219,8 +209,6 @@ ASLOCAL(Lbrdid2mach)
|
|||
.word CPU_68040
|
||||
.word MMU_68040
|
||||
.word FPU_68040
|
||||
.long _C_LABEL(buserr40)
|
||||
.long _C_LABEL(addrerr4060)
|
||||
.long Linit1x7
|
||||
#endif
|
||||
#ifdef MVME172
|
||||
|
@ -228,8 +216,6 @@ ASLOCAL(Lbrdid2mach)
|
|||
.word CPU_68060
|
||||
.word MMU_68040
|
||||
.word FPU_68060
|
||||
.long _C_LABEL(buserr60)
|
||||
.long _C_LABEL(addrerr4060)
|
||||
.long Linit1x2
|
||||
#endif
|
||||
#ifdef MVME177
|
||||
|
@ -237,8 +223,6 @@ ASLOCAL(Lbrdid2mach)
|
|||
.word CPU_68060
|
||||
.word MMU_68040
|
||||
.word FPU_68060
|
||||
.long _C_LABEL(buserr60)
|
||||
.long _C_LABEL(addrerr4060)
|
||||
.long Linit1x7
|
||||
#endif
|
||||
.word 0
|
||||
|
@ -254,19 +238,17 @@ Lgotmatch:
|
|||
extl %d1
|
||||
RELOC(cputype,%a1)
|
||||
movel %d1,%a1@
|
||||
|
||||
movew %a0@+,%d1 | Copy the MMU type
|
||||
extl %d1
|
||||
RELOC(mmutype,%a1)
|
||||
movel %d1,%a1@
|
||||
|
||||
movew %a0@+,%d1 | Copy the FPU type
|
||||
extl %d1
|
||||
RELOC(fputype,%a1)
|
||||
movel %d1,%a1@
|
||||
movel %a0@+,%a2 | Fetch the bus error vector
|
||||
RELOC(vectab,%a1)
|
||||
movl %a2,%a1@(8)
|
||||
movel %a0@+,%a2 | Fetch the address error vector
|
||||
movl %a2,%a1@(12)
|
||||
|
||||
movel %a0@,%a0 | Finally, the board-specific init code
|
||||
jmp %a0@
|
||||
|
||||
|
@ -622,11 +604,8 @@ Lmotommu2:
|
|||
*/
|
||||
Lenab1:
|
||||
/* Point the CPU VBR at our vector table */
|
||||
movc %vbr,%d0 | Preserve Bug's VBR address
|
||||
movl %d0,_ASM_LABEL(bug_vbr)
|
||||
movl #_C_LABEL(vectab),%d0 | get our VBR address
|
||||
movc %d0,%vbr
|
||||
lea _ASM_LABEL(tmpstk),%sp | temporary stack
|
||||
lea _ASM_LABEL(tmpstk),%sp | re-load temporary stack
|
||||
jbsr _C_LABEL(vec_init) | initialize vector table
|
||||
/* call final pmap setup */
|
||||
jbsr _C_LABEL(pmap_bootstrap_finalize)
|
||||
/* set kernel stack, user SP */
|
||||
|
@ -1121,7 +1100,7 @@ ENTRY_NOPROFILE(doboot)
|
|||
movw #PSL_HIGHIPL,%sr
|
||||
movl _C_LABEL(boothowto),%d1 | load howto
|
||||
movl %sp@(4),%d2 | arg
|
||||
movl _ASM_LABEL(bug_vbr),%d3 | Fetch Bug's original VBR value
|
||||
movl _C_LABEL(saved_vbr),%d3 | Fetch Bug's original VBR value
|
||||
movl _C_LABEL(machineid),%d4 | What type of board is this?
|
||||
movl #CACHE_OFF,%d0
|
||||
#if defined(M68040) || defined(M68060)
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: machdep.c,v 1.161 2023/12/20 00:40:44 thorpej Exp $ */
|
||||
/* $NetBSD: machdep.c,v 1.162 2024/01/13 20:18:47 thorpej Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1988 University of Utah.
|
||||
|
@ -39,7 +39,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.161 2023/12/20 00:40:44 thorpej Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.162 2024/01/13 20:18:47 thorpej Exp $");
|
||||
|
||||
#include "opt_ddb.h"
|
||||
#include "opt_m060sp.h"
|
||||
|
@ -958,41 +958,7 @@ dumpsys(void)
|
|||
void
|
||||
initcpu(void)
|
||||
{
|
||||
#if defined(M68060)
|
||||
extern void *vectab[256];
|
||||
#if defined(M060SP)
|
||||
extern uint8_t I_CALL_TOP[];
|
||||
extern uint8_t FP_CALL_TOP[];
|
||||
#else
|
||||
extern uint8_t illinst;
|
||||
#endif
|
||||
extern uint8_t fpfault;
|
||||
#endif
|
||||
|
||||
#if defined(M68060)
|
||||
if (cputype == CPU_68060) {
|
||||
#if defined(M060SP)
|
||||
/* integer support */
|
||||
vectab[61] = &I_CALL_TOP[128 + 0x00];
|
||||
|
||||
/* floating point support */
|
||||
vectab[11] = &FP_CALL_TOP[128 + 0x30];
|
||||
vectab[55] = &FP_CALL_TOP[128 + 0x38];
|
||||
vectab[60] = &FP_CALL_TOP[128 + 0x40];
|
||||
|
||||
vectab[54] = &FP_CALL_TOP[128 + 0x00];
|
||||
vectab[52] = &FP_CALL_TOP[128 + 0x08];
|
||||
vectab[53] = &FP_CALL_TOP[128 + 0x10];
|
||||
vectab[51] = &FP_CALL_TOP[128 + 0x18];
|
||||
vectab[50] = &FP_CALL_TOP[128 + 0x20];
|
||||
vectab[49] = &FP_CALL_TOP[128 + 0x28];
|
||||
#else
|
||||
vectab[61] = &illinst;
|
||||
#endif
|
||||
vectab[48] = &fpfault;
|
||||
}
|
||||
DCIS();
|
||||
#endif
|
||||
/* Nothing to do. */
|
||||
}
|
||||
|
||||
void
|
||||
|
|
|
@ -1,155 +0,0 @@
|
|||
| $NetBSD: vectors.s,v 1.11 2005/12/11 12:18:17 christos Exp $
|
||||
|
||||
| Copyright (c) 1997 Jason R. Thorpe. All rights reserved.
|
||||
| Copyright (c) 1988 University of Utah
|
||||
| Copyright (c) 1990, 1993
|
||||
| The Regents of the University of California. All rights reserved.
|
||||
|
|
||||
| Redistribution and use in source and binary forms, with or without
|
||||
| modification, are permitted provided that the following conditions
|
||||
| are met:
|
||||
| 1. Redistributions of source code must retain the above copyright
|
||||
| notice, this list of conditions and the following disclaimer.
|
||||
| 2. Redistributions in binary form must reproduce the above copyright
|
||||
| notice, this list of conditions and the following disclaimer in the
|
||||
| documentation and/or other materials provided with the distribution.
|
||||
| 3. All advertising materials mentioning features or use of this software
|
||||
| must display the following acknowledgement:
|
||||
| This product includes software developed by the University of
|
||||
| California, Berkeley and its contributors.
|
||||
| 4. Neither the name of the University nor the names of its contributors
|
||||
| may be used to endorse or promote products derived from this software
|
||||
| without specific prior written permission.
|
||||
|
|
||||
| THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
| ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
| IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
| ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
| FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
| DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
| OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
| HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
| LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
| OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
| SUCH DAMAGE.
|
||||
|
|
||||
| @(#)vectors.s 8.2 (Berkeley) 1/21/94
|
||||
|
|
||||
|
||||
#define BADTRAP16 \
|
||||
VECTOR(badtrap) ; VECTOR(badtrap) ; \
|
||||
VECTOR(badtrap) ; VECTOR(badtrap) ; \
|
||||
VECTOR(badtrap) ; VECTOR(badtrap) ; \
|
||||
VECTOR(badtrap) ; VECTOR(badtrap) ; \
|
||||
VECTOR(badtrap) ; VECTOR(badtrap) ; \
|
||||
VECTOR(badtrap) ; VECTOR(badtrap) ; \
|
||||
VECTOR(badtrap) ; VECTOR(badtrap) ; \
|
||||
VECTOR(badtrap) ; VECTOR(badtrap)
|
||||
|
||||
/*
|
||||
* bus error and address error vectors are initialized
|
||||
* in locore.s once we know our CPU type.
|
||||
*/
|
||||
|
||||
.data
|
||||
GLOBAL(vectab)
|
||||
VECTOR_UNUSED /* 0: (unused reset SSP) */
|
||||
VECTOR_UNUSED /* 1: NOT USED (reset PC) */
|
||||
VECTOR_UNUSED /* 2: bus error */
|
||||
VECTOR_UNUSED /* 3: address error */
|
||||
VECTOR(illinst) /* 4: illegal instruction */
|
||||
VECTOR(zerodiv) /* 5: zero divide */
|
||||
VECTOR(chkinst) /* 6: CHK instruction */
|
||||
VECTOR(trapvinst) /* 7: TRAPV instruction */
|
||||
VECTOR(privinst) /* 8: privilege violation */
|
||||
VECTOR(trace) /* 9: trace */
|
||||
VECTOR(illinst) /* 10: line 1010 emulator */
|
||||
VECTOR(fpfline) /* 11: line 1111 emulator */
|
||||
VECTOR(badtrap) /* 12: unassigned, reserved */
|
||||
VECTOR(coperr) /* 13: coprocessor protocol violation */
|
||||
VECTOR(fmterr) /* 14: format error */
|
||||
VECTOR(badtrap) /* 15: uninitialized interrupt vector */
|
||||
VECTOR(badtrap) /* 16: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 17: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 18: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 19: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 20: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 21: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 22: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 23: unassigned, reserved */
|
||||
VECTOR(intrhand_autovec)/* 24: spurious autovector interrupt */
|
||||
VECTOR(intrhand_autovec)/* 25: level 1 interrupt autovector */
|
||||
VECTOR(intrhand_autovec)/* 26: level 2 interrupt autovector */
|
||||
VECTOR(intrhand_autovec)/* 27: level 3 interrupt autovector */
|
||||
VECTOR(intrhand_autovec)/* 28: level 4 interrupt autovector */
|
||||
VECTOR(intrhand_autovec)/* 29: level 5 interrupt autovector */
|
||||
VECTOR(intrhand_autovec)/* 30: level 6 interrupt autovector */
|
||||
VECTOR(intrhand_autovec)/* 31: level 7 interrupt autovector */
|
||||
VECTOR(trap0) /* 32: syscalls */
|
||||
#ifdef COMPAT_13
|
||||
VECTOR(trap1) /* 33: compat_13_sigreturn */
|
||||
#else
|
||||
VECTOR(illinst)
|
||||
#endif
|
||||
VECTOR(trap2) /* 34: trace */
|
||||
#ifdef COMPAT_16
|
||||
VECTOR(trap3) /* 35: compat_16_sigreturn */
|
||||
#else
|
||||
VECTOR(illinst)
|
||||
#endif
|
||||
VECTOR(illinst) /* 36: TRAP instruction vector */
|
||||
VECTOR(illinst) /* 37: TRAP instruction vector */
|
||||
VECTOR(illinst) /* 38: TRAP instruction vector */
|
||||
VECTOR(illinst) /* 39: TRAP instruction vector */
|
||||
VECTOR(illinst) /* 40: TRAP instruction vector */
|
||||
VECTOR(illinst) /* 41: TRAP instruction vector */
|
||||
VECTOR(illinst) /* 42: TRAP instruction vector */
|
||||
VECTOR(illinst) /* 43: TRAP instruction vector */
|
||||
VECTOR(trap12) /* 44: TRAP instruction vector */
|
||||
VECTOR(illinst) /* 45: TRAP instruction vector */
|
||||
VECTOR(illinst) /* 46: TRAP instruction vector */
|
||||
VECTOR(trap15) /* 47: TRAP instruction vector */
|
||||
#ifdef FPSP
|
||||
ASVECTOR(bsun) /* 48: FPCP branch/set on unordered cond */
|
||||
ASVECTOR(inex) /* 49: FPCP inexact result */
|
||||
ASVECTOR(dz) /* 50: FPCP divide by zero */
|
||||
ASVECTOR(unfl) /* 51: FPCP underflow */
|
||||
ASVECTOR(operr) /* 52: FPCP operand error */
|
||||
ASVECTOR(ovfl) /* 53: FPCP overflow */
|
||||
ASVECTOR(snan) /* 54: FPCP signalling NAN */
|
||||
#else
|
||||
VECTOR(fpfault) /* 48: FPCP branch/set on unordered cond */
|
||||
VECTOR(fpfault) /* 49: FPCP inexact result */
|
||||
VECTOR(fpfault) /* 50: FPCP divide by zero */
|
||||
VECTOR(fpfault) /* 51: FPCP underflow */
|
||||
VECTOR(fpfault) /* 52: FPCP operand error */
|
||||
VECTOR(fpfault) /* 53: FPCP overflow */
|
||||
VECTOR(fpfault) /* 54: FPCP signalling NAN */
|
||||
#endif
|
||||
|
||||
VECTOR(fpunsupp) /* 55: FPCP unimplemented data type */
|
||||
VECTOR(badtrap) /* 56: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 57: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 58: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 59: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 60: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 61: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 62: unassigned, reserved */
|
||||
VECTOR(badtrap) /* 63: unassigned, reserved */
|
||||
|
||||
/*
|
||||
* PCC, PCCTWO, MC, and VME vectors are installed from 64-255
|
||||
* by the *intr_extablish() functions.
|
||||
*/
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
||||
BADTRAP16 /* 64-255: user interrupt vectors */
|
Loading…
Reference in New Issue