From freebsd if_vr.c:1.43,1.56 and if_vrreg.h:1.11,1.14
- Windows put the chip in suspended mode, make sure we unsuspend it. 1.43, by Takefumi SAYO <stake@po.shiojiri.ne.jp> - Detect the revision of the Rhine chip we're using, and force reset when the chip supports it. 1.65, by silby@freebsd.org
This commit is contained in:
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277fb5e18a
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615a1ff234
@ -1,4 +1,4 @@
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/* $NetBSD: if_vr.c,v 1.58 2002/10/21 23:38:12 fair Exp $ */
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/* $NetBSD: if_vr.c,v 1.59 2003/01/03 19:01:09 lha Exp $ */
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/*-
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/*-
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* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
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* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
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@ -104,7 +104,7 @@
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*/
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*/
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#include <sys/cdefs.h>
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_vr.c,v 1.58 2002/10/21 23:38:12 fair Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_vr.c,v 1.59 2003/01/03 19:01:09 lha Exp $");
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#include <sys/param.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/systm.h>
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@ -213,6 +213,8 @@ struct vr_softc {
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u_int8_t vr_enaddr[ETHER_ADDR_LEN];
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u_int8_t vr_enaddr[ETHER_ADDR_LEN];
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struct mii_data vr_mii; /* MII/media info */
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struct mii_data vr_mii; /* MII/media info */
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u_int8_t vr_revid; /* Rhine chip revision */
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struct callout vr_tick_ch; /* tick callout */
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struct callout vr_tick_ch; /* tick callout */
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bus_dmamap_t vr_cddmamap; /* control data DMA map */
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bus_dmamap_t vr_cddmamap; /* control data DMA map */
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@ -504,9 +506,17 @@ vr_reset(sc)
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if (!(CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RESET))
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if (!(CSR_READ_2(sc, VR_COMMAND) & VR_CMD_RESET))
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break;
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break;
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}
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}
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if (i == VR_TIMEOUT)
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if (i == VR_TIMEOUT) {
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if (sc->vr_revid < REV_ID_VT3065_A) {
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printf("%s: reset never completed!\n",
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printf("%s: reset never completed!\n",
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sc->vr_dev.dv_xname);
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sc->vr_dev.dv_xname);
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} else {
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/* Use newer force reset command */
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printf("%s: using force reset command.\n",
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sc->vr_dev.dv_xname);
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VR_SETBIT(sc, VR_MISC_CR1, VR_MISCCR1_FORSRST);
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}
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}
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/* Wait a little while for the chip to get its brains in order. */
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/* Wait a little while for the chip to get its brains in order. */
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DELAY(1000);
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DELAY(1000);
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@ -1453,6 +1463,9 @@ vr_attach(parent, self, aux)
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command |= PCI_COMMAND_MASTER_ENABLE;
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command |= PCI_COMMAND_MASTER_ENABLE;
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PCI_CONF_WRITE(PCI_COMMAND_STATUS_REG, command);
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PCI_CONF_WRITE(PCI_COMMAND_STATUS_REG, command);
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/* Get revision */
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sc->vr_revid = PCI_CONF_READ(VR_PCI_REVID) & 0x000000FF;
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/*
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/*
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* Map control/status registers.
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* Map control/status registers.
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*/
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*/
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@ -1512,6 +1525,13 @@ vr_attach(parent, self, aux)
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sc->vr_dev.dv_xname, intrstr);
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sc->vr_dev.dv_xname, intrstr);
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}
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}
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/*
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* Windows may put the chip in suspend mode when it
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* shuts down. Be sure to kick it in the head to wake it
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* up again.
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*/
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VR_CLRBIT(sc, VR_STICKHW, (VR_STICKHW_DS0|VR_STICKHW_DS1));
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/* Reset the adapter. */
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/* Reset the adapter. */
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vr_reset(sc);
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vr_reset(sc);
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@ -1,4 +1,4 @@
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/* $NetBSD: if_vrreg.h,v 1.9 1999/02/12 00:37:07 thorpej Exp $ */
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/* $NetBSD: if_vrreg.h,v 1.10 2003/01/03 19:01:09 lha Exp $ */
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/*
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/*
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* Copyright (c) 1997, 1998
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* Copyright (c) 1997, 1998
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@ -81,6 +81,11 @@
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#define VR_CONFIG 0x78
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#define VR_CONFIG 0x78
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#define VR_MPA_CNT 0x7C
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#define VR_MPA_CNT 0x7C
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#define VR_CRC_CNT 0x7E
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#define VR_CRC_CNT 0x7E
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#define VR_STICKHW 0x83
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/* Misc Registers */
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#define VR_MISC_CR1 0x81
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#define VR_MISCCR1_FORSRST 0x40
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/*
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/*
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* RX config bits.
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* RX config bits.
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@ -271,6 +276,13 @@
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#define VR_CFG_DIAG 0x40000000
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#define VR_CFG_DIAG 0x40000000
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#define VR_CFG_GPIOEN 0x80000000
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#define VR_CFG_GPIOEN 0x80000000
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/* Sticky HW bits */
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#define VR_STICKHW_DS0 0x01
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#define VR_STICKHW_DS1 0x02
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#define VR_STICKHW_WOL_ENB 0x04
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#define VR_STICKHW_WOL_STS 0x08
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#define VR_STICKHW_LEGWOL_ENB 0x80
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/*
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/*
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* Rhine TX/RX list structure.
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* Rhine TX/RX list structure.
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*/
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*/
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@ -334,6 +346,20 @@ struct vr_desc {
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#define VR_MIN_FRAMELEN 60
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#define VR_MIN_FRAMELEN 60
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/*
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* VIA Rhine revision IDs
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*/
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#define REV_ID_VT3043_E 0x04
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#define REV_ID_VT3071_A 0x20
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#define REV_ID_VT3071_B 0x21
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#define REV_ID_VT3065_A 0x40
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#define REV_ID_VT3065_B 0x41
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#define REV_ID_VT3065_C 0x42
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#define REV_ID_VT3106 0x80
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#define REV_ID_VT3106_J 0x80 /* 0x80-0x8F */
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#define REV_ID_VT3106_S 0x90 /* 0x90-0xA0 */
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/*
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/*
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* PCI low memory base and low I/O base register, and
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* PCI low memory base and low I/O base register, and
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* other PCI registers.
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* other PCI registers.
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@ -343,6 +369,7 @@ struct vr_desc {
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#define VR_PCI_DEVICE_ID 0x02
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#define VR_PCI_DEVICE_ID 0x02
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#define VR_PCI_COMMAND 0x04
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#define VR_PCI_COMMAND 0x04
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#define VR_PCI_STATUS 0x06
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#define VR_PCI_STATUS 0x06
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#define VR_PCI_REVID 0x08
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#define VR_PCI_CLASSCODE 0x09
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#define VR_PCI_CLASSCODE 0x09
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#define VR_PCI_LATENCY_TIMER 0x0D
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#define VR_PCI_LATENCY_TIMER 0x0D
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#define VR_PCI_HEADER_TYPE 0x0E
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#define VR_PCI_HEADER_TYPE 0x0E
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